| 同步时序电路优化中的时序重构技术 |
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| 引用本文： | 张岩,叶以正.同步时序电路优化中的时序重构技术[J].计算机辅助设计与图形学学报,1997(5). |
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| 作者姓名： | 张岩 叶以正 |
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| 作者单位： | 哈尔滨工业大学微电子中心 |
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| 摘 要： | 本文论述了自８０年代初以来，同步时序电路优化方法中出现的时序重构技术的基本理论、方法和应用，并指出了此技术进一步实用化的几种方法。
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| 关 键 词： | 综合技术，同步时序电路优化，时序重构 |
RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATION |
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| Zhang Yan and Ye YiZheng.RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATION[J].Journal of Computer-Aided Design & Computer Graphics,1997(5). |
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| Authors: | Zhang Yan and Ye YiZheng |
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| Abstract: | This paper reviews the theory, method and application on retiming in synchronous logic circuit, which has been developed since 1980s. Prospect is also given for retiming applications. |
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| Keywords: | synchronous logic circuit synthesis and optimization retiming |
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