基于演化硬件的容错系统设计技术研究

提出了一种基于演化硬件的N 模异构冗余容错系统设计方法．首先，改进了一种多目标进化算 法，利用改进的优化算法来设计多模冗余系统目标数字电路；然后，提出了多模数字电路设计的异构评价策 略，以用于N 模异构电路的优化设计；最后，将设计的异构数字电路用于组成N 模冗余容错系统，以提高容 错系统的可靠性．对单目标与多目标设计电路、同构与异构冗余电路的容错性能进行了理论分析和对比，给 出了异构电路评价方法和选择策略．以8 线—3 线编码器作为设计实例，实验结果证明了基于多目标进化设 计的异构电路所组成的容错系统具有更好的容错能力．

On Design Technology of Fault-tolerant System Based on Evolvable Hardware

A design method based on evolvable hardware is proposed for N-modular redundancy fault-tolerant system with different structures.Firstly,a multi-objective genetic algorithm is improved and is used to design some target digital circuits of multi-modular redundant system.Secondly,an evaluation strategy of multi-modular digital circuits with different structures is presented to optimize the design of N-modular system with different structures.Finally,the designed digital circuits with different structures are ...