| PCIE信号完整性问题的分析与优化 |
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| 引用本文： | 李青琴,林诗美.PCIE信号完整性问题的分析与优化[J].工业控制计算机,2022,35(2):50-51. |
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| 作者姓名： | 李青琴 林诗美 |
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| 作者单位： | 研祥智能科技股份有限公司,广东 深圳 518107;国家特种计算机工程技术研究中心,广东 深圳 518107 |
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| 摘 要： | PCI-Express是点对点的高速差分互连总线,是计算机系统上高速IO常用的总线,根据吞吐带宽的要求,可选择X1、X4、X8、X16的模式。由于PCIE2.0速率已达5Gbps,对传输线距离有一定的限制,若要实现超长距离的传输会导致信号衰减过大,在芯片接收端造成码间干扰、抖动、损耗等问题。针对工业计算机PCIE2.0长距离传输的互连拓扑,通过中继器的方式加强PCIE信号驱动力,改善长距离传输导致的信号完整性问题,经过实际的检测效果良好。
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| 关 键 词： | PCIE 眼图 损耗 中继器 |
Analysis and Optimization of PCIE Signal Integrity |
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| Abstract: | PCI Express is a point-to-point high-speed differential interconnect bus.It is a common bus for high-speed I0 in computer system.According to the requirements of throughput bandwidth,x1,x4,X8 and x16 modes can be selected.Since the pcie2.0 rate has reached 50 Gbps,there are certain restrictions on the transmission line distance.To realize ultra long-distance transmission,it will lead to excessive signal attenuation,inter symbol interference,jitter,loss and other problems at the chip receiving end.Aiming at the interconnection topology of industrial computer pcie2.0 long-distance transmission,this paper improves the signal integrity problem caused by long-distance transmission through the square of repeater or strengthening the positive signal driving force of PC,and the actual detection effect is good. |
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| Keywords: | PCIE eye diagram loss repeater |
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