| 一个VLIW体系结构的单片多处理机 |
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| 引用本文： | 汤志忠,张赤红.一个VLIW体系结构的单片多处理机[J].计算机研究与发展,1993,30(10):1-8. |
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| 作者姓名： | 汤志忠 张赤红 |
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| 作者单位： | 清华大学计算机系，清华大学计算机系 北京，100084，北京，100084 |
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| 摘 要： | 本介绍一个采用ＶＬＩＷ超长指令字体系结构的高性能单片多处理机，在这个体系结构中采用流水寄存器堆来消除循环程序内的数据相关，从而使程序能够在指令级以极高的并行度并行运行。模拟实验结果表明这个体系结构具有很高的运算速度和很好的性能价格比。
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| 关 键 词： | VLIW 体系结构 单片多处理机 |
A VLIW Architecture With a Single-Chip Multiprocessor |
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| Tang Zhizhong Zhang Chihong Dept.of Computers,Tsinghua University,Beijing.A VLIW Architecture With a Single-Chip Multiprocessor[J].Journal of Computer Research and Development,1993,30(10):1-8. |
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| Authors: | Tang Zhizhong Zhang Chihong Deptof Computers Tsinghua University Beijing |
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| Affiliation: | Tang Zhizhong Zhang Chihong Dept.of Computers,Tsinghua University,Beijing,100084 |
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| Abstract: | This paper introduces a VLIW architecture which integrates multiprocessor with same structure on a single chip.A pipeline register file is used to eliminate the data dependencies in the inner loops of the program,thus increasing the exploitation of instruction level parallelism in the program.The simulation results show the architecture has a very high speed. |
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| Keywords: | VLIW architecture pipelining register file data dependencies instruction level parallelism optimizing compiler |
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