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| 可重构计算的硬件结构 | |
| 引用本文： | 李仁发,周祖德,陈幼平,徐成,李方敏.可重构计算的硬件结构[J].计算机研究与发展,2003,40(3):500-506. |
| 作者姓名： | 李仁发 周祖德 陈幼平 徐成 李方敏 |
| 作者单位： | 1. 华中科技大学机械科学与工程学院,武汉,430074;湖南大学计算机与通信学院,长沙,410082 2. 华中科技大学机械科学与工程学院,武汉,430074 3. 湖南大学计算机与通信学院,长沙,410082 |
| 基金项目： | 国家自然科学基金项目 ( 699740 3 1) |
| 摘 要： | 首先讨论了可重构计算的基本含义及特点，指出它的实质是突破了通用微处理仅时间维可变，ASIC空间维可变的限制，实现时间、空间两维可编程。其次，系统地综述了基于FPGA的可重构计算硬件结构的基本技术，重点讨论了逻辑单远的粒度及单元间互连的路由问题，最后给出了基于可重构计算的几个典型体系结构框架。 |
| 关 键 词： | 可重构计算 FPGA 路由 体系结构 |
Hardware for Reconfigurable Computing |
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| LI Ren Fa ,ZHOU Zu De ,CHEN You Ping ,XU Cheng ,and LI Fang Min.Hardware for Reconfigurable Computing[J].Journal of Computer Research and Development,2003,40(3):500-506. | |
| Authors: | LI Ren Fa ZHOU Zu De CHEN You Ping XU Cheng and LI Fang Min |
| Affiliation: | LI Ren Fa 1,2,ZHOU Zu De 1,CHEN You Ping 1,XU Cheng 2,and LI Fang Min 2 1 |
| Abstract: | The basic meanings and features of reconfigurable computing are first discussed It is pointed out that reconfigurable computing has actually broken out the limitation of the general purpose CPU, which only varies in time dimension, and the limitation of ASIC, which only varies in space dimension Reconfigurable computing can be programmed in both time and space dimension Then described systematically are the basic technologies of hardware structure of reconfigurable computing based on FPGA Emphasis is put on the problems of particle size of logical units and routes between logical units Some typical products are introduced Finally, some typical architectures of reconfigurable computing are given |
| Keywords: | reconfigurable computing FPGA routing architecture |
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