| 面向处理器的系统级模拟、仿真及调试技术——基于软硬件协同设计的新方法 |
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| 引用本文： | 崔光佐,程旭,佟冬,刘强.面向处理器的系统级模拟、仿真及调试技术——基于软硬件协同设计的新方法[J].计算机研究与发展,2001,38(3):361-367. |
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| 作者姓名： | 崔光佐 程旭 佟冬 刘强 |
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| 作者单位： | 北京大学计算机科学系 |
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| 基金项目： | 本课题得到国家“九五”攻关项目(98-780-
01-06)、国家自然科学基金(69803002)和国家“八六三”高技术研究发展计划基金(863-306-ZT01-07-2)资助 |
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| 摘 要： | 基于软硬件协同设计技术提出了基于系统的模拟仿真和调试方法（SSED），其基本思想是：在模拟和仿真时建立真实的运行环境；利用可重定目标编译器和汇编器生成将C应用程序转换成汇编语言、执行代码及模拟和仿真的输入向量；利用时间模型进行汇编级调试；对运行结果进行分析。利用该方法设计Jbcore16的过程说明，该方法可进一步加速处理器的逻辑验证，方便对处理器设计的调试。
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| 关 键 词： | 微处理器 系统级模拟 仿真 调试 软件 硬件 协同设计 |
SYSTEM-LEVEL SIMULATION,
EMULATION AND DEBUGGING TECHNOLOGY FOR PROCESSOR |
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| CUI Guang-Zuo.SYSTEM-LEVEL SIMULATION,
EMULATION AND DEBUGGING TECHNOLOGY FOR PROCESSOR[J].Journal of Computer Research and Development,2001,38(3):361-367. |
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| Authors: | CUI Guang-Zuo |
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| Abstract: | Based on hardware/software codesign, a new kind of system level simulation, emulation and debugging method(called SSED) is proposed, which can be conveniently used in processor design. This method can be described as follows: set up execution environment according to real world applications;translate C program into assembly program, execution code and input vector which is used in simulation and emulation; debug VHDL program with assembler program under a kind of time model; analyze the execution results. The design and implementation of Jbcore16 processor indicates that SSED can increase verification efficience and accelerate processor design and implementation speed. |
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| Keywords: | processor hardware/software codesign retargetable compiler assembler generator system level simulation and emulation |
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