| 一种基于多核流水的多标准视频编解码器体系结构 |
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| 引用本文： | 张鹏,杜建国,解晓东,高文.一种基于多核流水的多标准视频编解码器体系结构[J].计算机研究与发展,2008,45(11). |
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| 作者姓名： | 张鹏 杜建国 解晓东 高文 |
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| 作者单位： | 中国科学院计算技术研究所,北京,100190 |
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| 摘 要： | 多标准已成为视频编解码器的发展趋势,这给系统设计带来了性能和灵活性双重的挑战.根据视频标准间算法的异同点,提出并实现了一种多标准视频编解码器芯片的体系结构,支持包括H.264/AVC,AVS和VC-1的多个标准.系统级采用了基于宏块的多核流水线结构,在保持可编程性的基础上显著提高了系统级的并行度.模块级进行了详细的软硬划分设计,可配置的专用数据通路用以加速各模块的特定运算.VLSI实现表明,芯片面积仅为961kgate,且能保证NTSC(30 fps)和PAL(25 fps)的实时编解码.
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| 关 键 词： | 多核 多标准 可编程性 视频编解码器 超大规模集成电路 |
A Multi-Standard Video Codec Architecture Based on Multi-Core Pipeline |
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| Zhang Peng,Du Jianguo,Xie Xiaodong,Gao Wen.A Multi-Standard Video Codec Architecture Based on Multi-Core Pipeline[J].Journal of Computer Research and Development,2008,45(11). |
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| Authors: | Zhang Peng Du Jianguo Xie Xiaodong Gao Wen |
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| Affiliation: | Zhang Peng,Du Jianguo,Xie Xiaodong,, Gao Wen (Institute of Computing Technology,Chinese Academy of Sciences,Beijing 100190) |
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| Abstract: | Supporting multi-standard is becoming the trend of video codec, which brings the challenge of both performance and flexibility in system design. The authors introduce the VLSI implementation of a video codec architecture which can support multiple video coding standards, including H.264/AVC, AVS, and VC-1. Algorithm characteristics of these standards are first analyzed. Based on the algorithm similarities and differences of them, several techniques are efficiently adopted to optimize the architecture at sys... |
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| Keywords: | multi-core multi-standard programmability video codec VLSI |
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