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多核处理器片上存储系统研究
引用本文:黄安文,高军,张民选.多核处理器片上存储系统研究[J].计算机工程,2010,36(4):4-6.
作者姓名:黄安文  高军  张民选
作者单位:国防科技大学计算机学院并行与分布处理国家重点实验室,长沙,410073
基金项目:国家自然科学基金资助项目(60873016);;国家“863”计划基金资助项目(2008AA01Z147,2007AA01Z102)
摘    要:针对多核处理器计算能力和访存速度间差异不断增大对多核系统性能提升的制约问题,分析几款典型多核处理器存储系统的设计特点,探讨多核处理器片上存储系统发展的关键技术,包括延迟造成的非一致cache访问、核与cache互连形式对访存性能的束缚以及片上cache设计的复杂化等。

关 键 词:多核  存储系统  非一致cache访问
修稿时间: 

Research on On-chip Memory System of Multi-core Processor
HUANG An-wen,GAO Jun,ZHANG Min-xuan.Research on On-chip Memory System of Multi-core Processor[J].Computer Engineering,2010,36(4):4-6.
Authors:HUANG An-wen  GAO Jun  ZHANG Min-xuan
Affiliation:(National Key Laboratory for Parallel and Distributed Processing, School of Computer Science, National University of Defense Technology, Changsha 410073)
Abstract:Aiming at the problem that memory system on chip becomes a bottleneck of improving the performance of multi-core processor as the speed distinction between CPU and memory increases. This paper analyses the design characters of memory system in multi-core processor, such as Non-Uniform Cache Access(NUCA) caused by delay, constraint to access performance of connection between core and cache, and complexity of on-chip cache design.
Keywords:multi-core  memory system  Non-Uniform Cache Access(NUCA)
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