芯片级BIST控制器的设计与实现

为适应某型国产航电设备故障的实时自检测及定位需要，设计一个针对自测试电路的芯片级BIST控制器。传统的测试方法存在测试时间长和故障覆盖率不高的缺点。为此，采用伪随机测试向量和确定性测试向量相结合的混合BIST技术及多扫描链、压缩向量技术，对芯片级BIST控制器进行研究，给出功能模块的设计方案。利用Quartus II软件对设计进行仿真，测试结果证实该设计可达到某型航电设备的故障自检测要求。

Design and Implementation of Chip-level BIST Controller

In order to meet the needs of real-time and self-test of some domestic avionic equipment malfunction,the chip-level Build-in-Self-Test（BIST） controller aiming at self-test circuit is designed.The traditional test method has defects of time-consuming process and low fault coverage.Resulting from adopting mixed BIST technique combining paseudo-random test vector with certain test vector,multiple scan chain and compressed vector technique,an in-depth study on chip-level BIST controller technique is done,thereby raising a design proposal of specific function module.Owing to the Quartus II role in emulating to the design,the design can meet the self-test demand of avionic equipment malfunction.