一种基于总线控制器的SoC功耗分析方法

总线是观测数据流行为从而进行媒体处理SoC芯片系统级功耗分析的较佳研究对象。Wishbone总线具有简单、灵活、免费等特点，是具有较强竞争力的系统芯片总线(SoC Bus)标准之一。在媒体处理SoC芯片的Wishbone总线控制器中增加具有功耗分析功能的专用模块，可以在不改变正常集成电路EDA设计流程的情况下较好地完成系统层次的功耗分析任务，在低功耗设计中具有广泛的应用前景。

A System-level Power Analysis Method Based-on SoC Bus Controller

SoC bus based power analysis technique is appropriate for system level power estimation. Wishbone is one of the most prospective SoC bus standards. A system level power analysis method based on Wishbone bus controller is purposed here. Through the technique, the power estimation at the early design stage is performed without modification of EDA design flow. The power consumption of main memory of a typical SoC platform is applied to testify the method and generate good results.