首页 | 本学科首页   官方微博 | 高级检索  
     

数字锁相环的优化设计与应用
引用本文:胡永红.数字锁相环的优化设计与应用[J].计算机测量与控制,2006,14(8):1085-1086,1092.
作者姓名:胡永红
作者单位:西北工业大学第365研究所,陕西,西安,710072
摘    要:为了提高数字锁相环的工作频率、改善环路性能,提出了提高环路的优化设计方法,给出了数字锁相环(DPLL)的工作原理,通过对数字锁相环电路的设计分析,详细论述了利用数字微分将锁相环的鉴相器和环路滤波器完全数字化的电路设计方法,仿真结果表明:环路的工作频率由原来的几百kHz提高到几MHz,目前该数字锁相环已成功地应用于某测控系统中,应用结果证实:该数字锁相环具有工作频率高、捕获时间及精度可调、接口简单、通用性好等特点,可推广应用于远程测量与控制系统中.

关 键 词:数字锁相环(DPLL)  数字微分  数字鉴相器  数字环路滤波器
文章编号:1671-4598(2006)08-1085-02
修稿时间:2005-11-162005-12-18

Optimization Design and Application of Digital Phase Locked Loop
Hu Yonghong.Optimization Design and Application of Digital Phase Locked Loop[J].Computer Measurement & Control,2006,14(8):1085-1086,1092.
Authors:Hu Yonghong
Abstract:In order to enhance work frequency and improve performance of the digital phase locked loop(DPLL),the optimization method is given.It shows the analysis of DPLL design helps improving the running frequency of DPLL.The optimization design about phase discriminator and filter of loop are given.The design method of digital phase detector and loop filter for DPLL is dissertated in detail by using digital differential.Simulation showed that DPLL's work frequency achieve several MHz from primary hundreds kHz.At present,the DPLL has been successfully applied in a telecontrol and telemetering system.The application result proved that the DPLL has some characteristic sucb as higher working frequency,alterable capture time and accuracy,simple interface and good currency etc.It is useful for long-distance measurement and control system.
Keywords:digital phase locked loop  digital differential coefficient  digital phase discriminator  digital filter of loop
本文献已被 CNKI 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号