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基于RTEthernet改进的时钟同步算法
引用本文:陈佳佳,张凤登,张宇辉.基于RTEthernet改进的时钟同步算法[J].计算机测量与控制,2022,30(3):229-233.
作者姓名:陈佳佳  张凤登  张宇辉
作者单位:上海理工大学光电信息与计算机工程学院,上海 200093
基金项目:国家自然科学基金项目(面上项目,重点项目,重大项目)
摘    要:以太网其庞大的网络系统在复杂的环境中存在网络链路延迟,节点时钟的漂移,同步能力差等问题。通过研究RTEthernet协议的起源和工作原理,考虑到影响实时以太网时间同步精密度的时钟拜占庭故障、网络传输延迟和漂移率等三个因素,建立了符合RTEthernet协议的通信模型。对FTA时钟同步算法在故障下时钟同步精密度损失率提升较少的问题进行了研究,引入了滑动窗口技术,提出了容错滑动窗口(Fault-Tolerant Sliding Window, FTSW)算法。容错滑动窗口算法能进一步提高分布式系统在进行时钟同步是对故障节点的容错能力。最后,使用CANoe仿真工具对FTSW算法进行仿真验证, FTSW算法的容错性优于FTA时钟同步算法算法,且在系统(七个节点)中存在两个拜占庭故障的情况下,同步后的精密度损失率降低了7.1%。

关 键 词:RTEthernet  FTSW  以太网  拜占庭故障  时钟同步
收稿时间:2021/9/16 0:00:00
修稿时间:2021/10/21 0:00:00

Improved clock synchronization algorithm based on RTEthernet
CHEN Jiajia,ZHANG Fengdeng,ZHANG Yuhui.Improved clock synchronization algorithm based on RTEthernet[J].Computer Measurement & Control,2022,30(3):229-233.
Authors:CHEN Jiajia  ZHANG Fengdeng  ZHANG Yuhui
Abstract:Ethernet with its huge network system has problems such as network link delay, drift of node clocks and poor synchronization capability in a complex environment. By studying the origin and working principle of RTEthernet protocol, a communication model conforming to RTEthernet protocol is established considering three factors such as clock Byzantine faults, network transmission delays and drift rates that affect the precision of real-time Ethernet time synchronization. The problem that the FTA clock synchronization algorithm has less improvement in clock synchronization precision loss rate under fault is studied, the sliding window technology is introduced, and the Fault-Tolerant Sliding Window (FTSW) algorithm is proposed. The Fault-Tolerant Sliding Window algorithm can further improve the fault tolerance of the distributed system to the faulty nodes when clock synchronization is performed. Finally, the FTSW algorithm is simulated using the CANoe simulation tool to verify that the FTSW algorithm is more fault-tolerant than the FTA clock synchronization algorithm algorithm, and in the case of two Byzantine faults in the system (seven nodes), the precision loss rate after synchronization is reduced by 7.1%.
Keywords:Clock Synchronization
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