多处理机系统循环间数据重用的cache优化*

cache的使用缓解了CPU和主存储器之间速度差距太大的矛盾，同时，也使cache的命中率成为影响多处理机系统性能发挥的重要因素.人们对如何加强数据的局部性，提高cache命中率，使多处理机系统的性能得到更好的发挥进行了积极的探索.但过去的工作主要集中于如何加强并行循环内的数据局部性，减少甚至消除并行循环内真假共享cache行所引起的cache抖动，对多处理机系统中循环间数据重用的开发和利用却少有论述.该文对如何开发和利用这些循环间数据重用进行了分析和讨论，并提出了一些切实可行、易于实现的方法.这些方法的

Cross-loop Reuse Techniques for Cache Optimizations on Multiprocessors

The use of the cache reduces the gap between the CPU speed and the memory latency, so the cache hit ratio becomes an important factor which affects the performance of multiprocessor system. Researchers have developed a number of optimizations to enhance data locality, increase the cache hit ratio and bring the multiprocessor system performance into better play. These techniques focus on how to enhance data locality within a parallel loop, reduce and even eliminate the cache line thrashing due to true or false sharing of the cache line. Exploitation and utilization of cross-loop reuse on multiprocessors are seldom discussed. How to exploit and utilize these cross-loop reuse, and put forward some feasible and easy ways for implementation are discussed in this paper. Application of these methods can effectively increase the cache hit ratio, thus improve the performance of multiprocessor system.