基于FPGA的高速数据长线传输系统的设计

提出了以CycloneⅡ系列FPGA芯片EP2C5T144为核心,基于低压差分信号(LVDS)接口技术的高速数据长线传输系统的设计方案,该方案利用FPGA实现数据的串/并、并/串转换以及LVDS信号的驱动和接收,解决了不同接口标准的电平转换、阻抗匹配以及信号长线传输过程中的衰减与恢复等问题,具有设计简单、抗干扰能力强、体积小、成本低、集成度高等优点。通过实验表明,该系统工作稳定,实现了串行数据在100 m非屏蔽双绞线上以50 Mb/s的速率传输,并且具有良好的传输效果,完全满足系统设计要求。

Design of High-Speed Data and Long-Distance Transmission System Based on FPGA

Design scheme of high-speed and long-distance transmission system is proposed,whose core is CycloneⅡseries FPGA chip EP2C5T144,based on low voltage differential signals(LVDS) interface technology. The scheme implements serial-to-parallel conversion,parallel-to-serial conversion,LVDS’ driving and receiving through FPGA,it solves some problems such as the voltage conversion of different interface standards,impedance matching,the signals’ attenuation and resumption in the process of long-distance transmission.The scheme has advantages of simple design,strong anti-jamming ability,small size,low cost and high integration. Experimental results show that the system works steadily,the serial data transmitting at the speed of 50 Mb/s on the 100 m unshielded twisted pair with the perfect transmission effect,which fully meet the need of design.