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低功耗SMT体系结构研究
引用本文:赵荣彩,唐志敏.低功耗SMT体系结构研究[J].计算机工程与设计,2002,23(8):7-12,17.
作者姓名:赵荣彩  唐志敏
作者单位:中国科学院计算技术研究所,北京,100080
基金项目:国家863高科技基金资助项目(项目编号:2001AA111070)。
摘    要:由于应用程序中ILP和TLP的不足或不均衡性,使得超标量和多处理的性能和资源用率受到了挑战;而同时多线程(SMT)处理器则是一种能够充分利用资源,动态进行TLP到ILP转换的能量有效结构。文章围绕高性能、低功耗这两个目标讨论和探究了WMT体系结构的基本思想、设计技术、低功耗考虑了以及编译器和操作系统设计应注意和对待的新问题。

关 键 词:低功耗SMT  体系结构  微处理器  指令提取部件
文章编号:1000-7024(2002)08-0007-06

A study of SMT architecture for low power
ZHAO Rong-cai,TANG Zhi-min.A study of SMT architecture for low power[J].Computer Engineering and Design,2002,23(8):7-12,17.
Authors:ZHAO Rong-cai  TANG Zhi-min
Abstract:Superscalar and multiprocessing have encountered a challenge because of applications without enough and balance of ILP and TLP. But the simultaneous multithreading (SMT) processor is a kind of energy-efficient architecture which can takes a full use of the hardware resources and transforms TLP to ILP dynamically. With the goals of high performance and low power, this paper discusses and exploits the basic idea of SMT architecture, design technology, consideration on low power and the new problems which should be taken care and solved by the designers of operating system and compiler.
Keywords:multithreading  low power  architecture  compile  
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