Understanding the future of energy-performance trade-off via DVFS in HPC environments |
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Authors: | M Etinski J Corbalan J Labarta M Valero |
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Affiliation: | Computer Science Department, Barcelona Supercomputing Center, Barcelona, Spain; Department of Computer Architecture, Technical University of Catalonia, Barcelona, Spain |
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Abstract: | DVFS is a ubiquitous technique for CPU power management in modern computing systems. Reducing processor frequency/voltage leads to a decrease of CPU power consumption and an increase in the execution time. In this paper, we analyze which application/platform characteristics are necessary for a successful energy-performance trade-off of large scale parallel applications. We present a model that gives an upper bound on performance loss due to frequency scaling using the application parallel efficiency. The model was validated with performance measurements of large scale parallel applications. Then we track how application sensitivity to frequency scaling evolved over the last decade for different cluster generations. Finally, we study how cluster power consumption characteristics together with application sensitivity to frequency scaling determine the energy effectiveness of the DVFS technique. |
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Keywords: | DVFS Energy efficiency High performance computing |
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