| 基于VHDL实现逻辑控制的高速数据采集系统 |
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| 引用本文： | 朱然刚,叶春逢,钟子发.基于VHDL实现逻辑控制的高速数据采集系统[J].微处理机,2005,26(3):49-51,56. |
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| 作者姓名： | 朱然刚 叶春逢 钟子发 |
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| 作者单位： | 解放军电子工程学院702研究室,合肥,230037 |
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| 摘 要： | 本文介绍了一种采用现场可编程器件实现逻辑控制的高速数据采集系统的设计方法,讲述了系统硬件总体结构、分析了高性能的电子元器件,最后介绍了VHDL语言实现控制及MAX PLUSII开发软件的仿真结果.实验证明:该系统具有很强的灵活性和很高的实用价值.
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| 关 键 词： | 复杂可编程逻辑器件 模数转换 先进先出 |
| 文章编号： | 1002-2279(2005)03-0049-03 |
The VHDL-based Implementation of High-speed Isochronous Data Acquisition System |
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| ZHU Ran-gang,YE Chun-feng,ZHONG Zi-fa.The VHDL-based Implementation of High-speed Isochronous Data Acquisition System[J].Microprocessors,2005,26(3):49-51,56. |
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| Authors: | ZHU Ran-gang YE Chun-feng ZHONG Zi-fa |
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| Abstract: | In this paper, a high-speed data acquisition system is studied. The author addresses the hardware frame firstly, and then analyzes the powerful elements used in the system. At last, VHDL program and emulation are presented in detail. Experiment indicates that the data acquisition system has high performance. |
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| Keywords: | VHDL |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
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