| 基于CPLD及Flash实现FPGA配置的研究 |
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| 引用本文： | 钟祺,谢顺依,杨迎化.基于CPLD及Flash实现FPGA配置的研究[J].微处理机,2008,29(5). |
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| 作者姓名： | 钟祺 谢顺依 杨迎化 |
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| 作者单位： | 海军工程大学,武汉,430033 |
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| 摘 要： | 分析了Xilinx公司的SpartanII型FPGA配置原理及时序图,在此基础上利用有限状态机给出了使用CPLD结合Flash实现FPGA配置功能的设计,并进行了仿真,仿真结果完全符合FPGA的配置时序。设计经过调试已经得到实际应用,并且可以用于其它型号的FPGA。
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| 关 键 词： | 场可编程门阵列 配置 有限状态机 |
Research on Configuration of FPGA Based on CPLD and Flash |
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| ZHONG Qi,XIE Shun-yi,YANG Ying-hua.Research on Configuration of FPGA Based on CPLD and Flash[J].Microprocessors,2008,29(5). |
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| Authors: | ZHONG Qi XIE Shun-yi YANG Ying-hua |
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| Abstract: | This paper analyses the configuration theory and clocking sequence of FPGA which is the product of Xillinx Company.Based on this,using the finite state machines the design is given to realize the function of FPGA configuration by CPLD and Flash.Simulation and experimental results show that the clocking sequences is correct and design is practical. |
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| Keywords: | FPGA Configuration Finite states machines |
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