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Processor preallocation and load balancing of DOALL loops
Authors:Gary W Elsesser  Viet N Ngo  Sourav Bhattacharya  Wei -Tek Tsai
Affiliation:(1) Cray Research Park, 655 Lone Oak Drive, 55121 Eagan, MN;(2) Honeywell Technology Center, 3600 Technology Drive, 55418 Minneapolis, MN;(3) Department of Computer Science, University of Minnesota, 55455, MN
Abstract:Load balance is important because it may affect the speedup attained through the concurrent execution of loop iterations on a parallel processor. We study loop load balance in the context of the well-known Perfect benchmarks. Several static and dynamic characteristics of the Perfect benchmark DOALL loops are observed and interpreted. Thelate arrival of processors is noted as a major source of load imbalance. This observation suggested the idea ofprocessor preallocation. An analytic cost model is presented and the advantages of processor preallocation are demonstrated by experimental evaluation on a CRAY Y-MP8 under the Unicos operating system.
Keywords:DOALL  loop scheduling  Perfect Club  shared memory  SPMD paradigm
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