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| 基于同步Slave FIFO技术的高速USB数传系统设计 | |
| 引用本文： | 马琦,吉春花,兰兴,王海滨.基于同步Slave FIFO技术的高速USB数传系统设计[J].单片机与嵌入式系统应用,2013,13(7):51-54. |
| 作者姓名： | 马琦 吉春花 兰兴 王海滨 |
| 作者单位： | 1. 吉尔达集团公司,南通,226300 2. 空军工程大学 3. 海军飞行学院 |
| 摘 要： | 给出一种基于"USB2.0Slave接口芯片+FPGA"架构的高速USB数传系统设计方案。系统以CY7C68013A为USB协议桥、FPGA为逻辑控制单元,优化设计有限状态机实现同步Slave FIFO接口协议,构建了USB数据高速传输通道,保证了数据传输、处理过程中的可靠性、实时性和高效性;优化了芯片固件加载方式,实现了系统在线自动升级加载功能。经实测,系统的数据传输处理能力平均可达320Mb/s,接近USB2.0协议规定的极限速率,固件可在1.2s内完成自动加载,使系统具备了快速升级能力。 |
| 关 键 词： | FPGA USB2.0 CY7C68013A Slave FIFO PS模式 C0模式 |
High Speed USB Transport System Based on Slave FIFO |
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| Ma Qi , Ji Chunhua , Lan Xing , Wang Haibin.High Speed USB Transport System Based on Slave FIFO[J].Microcontrollers & Embedded Systems,2013,13(7):51-54. | |
| Authors: | Ma Qi Ji Chunhua Lan Xing Wang Haibin |
| Affiliation: | 1. J i Er Da Group, Nantong 226300,China; 2. Air Force Engineering University;3. The Naval Fly Academy) |
| Abstract: | This article introduces a kind of high speed USB transport system based on the structure of ＂USB2.0 Slave interface chip ＋ FPGA＂. The system uses CY7C68013A as USB protocol bridge and FPGA as its control center,and designs optimized finite-state machine to realize syn- chronous slave FIFO protocol. The USB data high speed transport channel is constructed and the system acquires good performance in real-time processing, transmission reliability and efficiency. At the same time an optimized software loading method is designed to ensure that the system software can be update on line without any manual operation. The test results show that the system can run stably at the average data transfer rate of up to 40 MB/s and the system software can be update automatically in 1.2 seconds. |
| Keywords: | FPGA USB2 0 CY7C68013 A Slave FIFO PS Model C0 Model |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ | |