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SM5100百兆以太网的1553B总线数据传输设计
引用本文:苏慧思,甄国涌,陈建军,贾兴中.SM5100百兆以太网的1553B总线数据传输设计[J].单片机与嵌入式系统应用,2022,22(3):74-77.
作者姓名:苏慧思  甄国涌  陈建军  贾兴中
作者单位:中北大学电子测试技术国家重点实验室仪器科学与动态测试教育部重点实验室,太原030051
摘    要:为满足航天飞控系统对国产1553B总线数据传输测试设备的需求,设计了一种基于SM5100百兆以太网控制的1553B总线数据传输系统。为弥补国产芯片的不足,通信板卡多采用信号完整性设计和冗余设计,以太网主控卡采用TCP/IP通信协议,通过自定义背板总线实现BC与RT的数据传输。系统采用FPGA作为主控制器,通过其配置相关寄存器实现B61580S6和SM5100的逻辑设计。测试结果表明,该系统数据传输可靠,无丢帧现象,可实现20 Mbps速率的稳定传输,满足航天工程应用。

关 键 词:FPGA  以太网  1553B总线  数据传输

Design of 1553B Bus Data Transmission Based on SM5100100M Ethernet
Su Huisi,Zhen Guoyong,Chen Jianj un,Jia Xingzhong.Design of 1553B Bus Data Transmission Based on SM5100100M Ethernet[J].Microcontrollers & Embedded Systems,2022,22(3):74-77.
Authors:Su Huisi  Zhen Guoyong  Chen Jianj un  Jia Xingzhong
Affiliation:(Key Laboratory of Instrumentation Science and Dynamic Measurement of Ministry of Education,National Key Laboratory of Electronic Measurement Technology,North University of China,Taiyuan 030051,China)
Abstract:In order to meet the requirements of the domestic 1553B bus data transmission testing equipment for the space flight control system,a 1553B bus data transmission system based on SM5100100M Ethernet control is designed.In order to overcome the deficiency of domestic chips,signal integrity design and redundancy design are adopted in communication board cards.TCP/IP communication protocol is adopted in Ethernet master control cards,and data transmission between BC and RT is realized by custom backplane bus.The system uses FPGA as the main controller,and realizes the logic design of B61580S6 and SM5100 by configuring relevant registers.The experiment results show that the data transmission of the system is reliable,no frame loss phenomenon,and can realize the stable transmission rate of 20 Mbps,which can meet the application of aerospace engineering.
Keywords:FPGA  Ethernet  1553B bus  data transfer
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