| 工程爆破的FPGA多路同步数据采集控制器 |
| |
| 引用本文： | 张晶威.工程爆破的FPGA多路同步数据采集控制器[J].单片机与嵌入式系统应用,2011(9):22-24. |
| |
| 作者姓名： | 张晶威 |
| |
| 作者单位： | 中北大学电子测试技术国家重点实验室; |
| |
| 摘 要： | 介绍了一种在工程爆破振动数据采集中应用的控制器设计方案.系统采用Altera公司的FPGA作为主控制器芯片,其中集成控制逻辑单元与NiosⅡ软核嵌入式处理器二者结合成为单芯片控制器方案.控制器运用多路FIFO进行数据缓冲,顺序传输数据至外部存储器,实现了多路数据的同步采集.单芯片处理器电路结构设计简单可靠,系统采集了同...
|
| 关 键 词： | 同步采集 振动监测 NiosⅡ SoC |
Synchronous Blast Vibration Data Acquisition Controller Base on FPGA |
| |
| Zhang Jingwei.Synchronous Blast Vibration Data Acquisition Controller Base on FPGA[J].Microcontrollers & Embedded Systems,2011(9):22-24. |
| |
| Authors: | Zhang Jingwei |
| |
| Affiliation: | Zhang Jingwei(National Key Laboratory for Electronic Measurement Technology,North University of China,Taiyuan 030051,China) |
| |
| Abstract: | An embedded system controller is provided for blast vibration data acquisition.Altera FPGA is used for main controller,in which the logic unit and the NiosⅡ core are embedded in the FPGA as a single chip scheme.The FIFO memories are used as the buffer for parallel data,and then the data is transported to SDRAM.The single chip design is simple and reliable.The acquired synchronous data support blast vibration analysis and monitoring. |
| |
| Keywords: | synchronous data acquisition vibration monitor NiosⅡ SoC |
| 本文献已被 CNKI 维普 等数据库收录！ |
