| 脉冲取样锁相环的设计与实现 |
| |
| 引用本文： | 刘丽静,宋亮.脉冲取样锁相环的设计与实现[J].计算机与网络,2011(6):45-48. |
| |
| 作者姓名： | 刘丽静 宋亮 |
| |
| 作者单位： | [1]西安电子科技大学,陕西西安710071 [2]中国电子科技集团公司第五十四研究所,河北石家庄050081 |
| |
| 摘 要： | 为实现脉冲取样锁相环,描述了工作原理,分析了相位噪声模型,提出了设计中的问题,并给出了设计实例.设计中采用高频集成取样鉴相器以及具有优异噪声性能、高频谱纯度和高稳定度的介质振荡器(DRO),通过高级设计系统(ADS)仿真,实现了较高的相位噪声指标,相位噪声测试结果与理论值非常接近．与数字锁相环相比,脉冲取样锁相环具有优...
|
| 关 键 词： | 脉冲取样锁相环 数字锁相环 相位噪声 鉴相器 |
Design and Implementation of Pulse Sampling Phase-locked Loop |
| |
| LIU Li-jing; SONG Liang.Design and Implementation of Pulse Sampling Phase-locked Loop[J].China Computer & Network,2011(6):45-48. |
| |
| Authors: | LIU Li-jing; SONG Liang |
| |
| Affiliation: | LIU Li-jing; SONG Liang (1. Xidian University, Xi＇an Shaanxi 710071, China) (2. The 54th Research Institute of CETC, Shijiazhuang Hebei 050081, China) |
| |
| Abstract: | To design pulse sampling phase-locked loop, this paper describes the basic operation principle, analyzes the model of phase noise and puts forward the problems in implementation. In the design, the high-frequency integrated sampling phase detector and D10 performance with lower phase noise, high spectral purity and high frequency stability are adopted. The simulation is implemented by ADS, and the simulation result shows that the higher specification of phase noise is realized. The result of phase noise of sampling phase-locked loop is similar to the theoretical value. Compared with numeral phase-locked loop, the pulse sampling phase-locked loop has excellent performance of phase noise. |
| |
| Keywords: | pulse sampling phase-locked loop numeral phase-locked loop phase noise phase detector |
| 本文献已被 维普 等数据库收录！ |
|
