首页 | 本学科首页   官方微博 | 高级检索  
     

异步串行通信的研究与实现
引用本文:吕玄兵,陈智杰,宋子建,潘家祥.异步串行通信的研究与实现[J].计算机系统应用,2015,24(6):232-235.
作者姓名:吕玄兵  陈智杰  宋子建  潘家祥
作者单位:1. 许继电气股份有限公司,许昌,461000
2. 大盛微电科技股份有限公司,许昌,461000
3. 国网营口供电公司,营口,115000
摘    要:为提高串行通信在实际应用中的抗干扰能力,设计实现一种异步串行通信方法。通信数据采用差分曼彻斯特编码,根据编码特点获取同步时钟来对传输数据进行解码和接收。本文基于FPGA实现了异步串行通信的发送模块、编码模块、解码模块和接收模块,并对该通信方法进行实际测试验证。测试结果表明,本文给出的异步串行通信方法稳定可行。

关 键 词:同步时钟  差分曼彻斯特编码  FPGA  解码  通信协议
收稿时间:2014/9/28 0:00:00
修稿时间:2014/11/3 0:00:00

Research and Realization of Asynchronous Serial Communication
LV Xuan-Bing,CHEN Zhi-Jie,SONG Zi-Jian and PAN Jia-Xiang.Research and Realization of Asynchronous Serial Communication[J].Computer Systems& Applications,2015,24(6):232-235.
Authors:LV Xuan-Bing  CHEN Zhi-Jie  SONG Zi-Jian and PAN Jia-Xiang
Affiliation:XJ Elecric CO.Ltd, Xuchang 461000, China;XJ Elecric CO.Ltd, Xuchang 461000, China;Dasheng Microgrid Technology CO.Ltd, Xuchang 461000, China;Estate Grid Yingkou Electric Power Supply Company, Yingkou 115000, China
Abstract:To improve the anti-interference ability of serial communication, this paper designs and implements an asynchronous serial communication method. Communication data is encoded in the form of Differential Manchester Encoding. According to the characteristics of Differential Manchester Encoding, this paper designs a logic module to get synchronous clock and receive every bit of data transmitted Based on FPGA. This paper realizes the sending module, encoding module, decoding module and receiving module. The method given in this paper is tested and proved to be stable and feasible.
Keywords:synchronous clock  differential manchester encoding  FPGA  decoding  communication protocol
本文献已被 万方数据 等数据库收录!
点击此处可从《计算机系统应用》浏览原始摘要信息
点击此处可从《计算机系统应用》下载全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号