VISA：基于动态二进制翻译优化技术的可扩展体系结构

体系结构设计经常要在代码兼容和结构创新之间进行折衷。保证代码兼容的体系结构难以引入创新性的体系结构技术，或者导致最终结构变得相当复杂。本文提出一种基于动态二进制翻译优化的可扩展处理器结构VISA。VISA在实现兼容的前提下拓展了体系结构设计的空间。模拟结果显示，VISA性能优于现有的动态二进制翻译优化框架，并有更高
高的性能潜力和扩展空间。

VISA:A Scalable Architecture Based on Dynamic Binary Translation

Architects always trade off between code compatibility and architecture novelty. To keep the backward compatibility of new architectures, new innovation will be too difficult to apply, or even tune the result architecture with terrible complexity. This paper presents VISA, a scalable processor architecture based on dynamic binary translation (BT) and optimization. Keeping the full compatibility, VISA extends the design space of architecture at the same time. Simulation shows that VISA is better than traditional BT. And it has further potential both in performance and scalability space.