| 基于FPGA的FFT处理器的设计与验证 |
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| 引用本文： | 王正勤,朱向冰.基于FPGA的FFT处理器的设计与验证[J].数字社区&智能家居,2007,2(6):1379-1380,1382. |
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| 作者姓名： | 王正勤 朱向冰 |
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| 作者单位： | [1]安徽商贸职业技术学院计算机系,安徽芜湖241000 [2]安徽师范大学电信系,安徽芜湖241000 |
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| 摘 要： | 介绍一种基于FPGA，选择FFT的基一2DIT处理算法，在ISE6．2I开发平台上完成32位浮点运算的FFT信号处理器设计：利用Modelsim工具软件对系统的逻辑综合和时序进行仿真，并将系统的结果与Matlab计算结果相比较，验证了设计结果的精确性；实验表明利用FPGA实现FFT，运算速度快，可以满足高速信号处理的应用场合。
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| 关 键 词： | FPGA FFT 基-2 DIT ISE6．2I |
| 文章编号： | 1009-3044（2007）11-21379-02 |
| 修稿时间： | 2007-04-23 |
The Design and Certification of FFT Processor Based on FPGA |
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| WANG Zheng-qin,ZHU Xiang-bin.The Design and Certification of FFT Processor Based on FPGA[J].Digital Community & Smart Home,2007,2(6):1379-1380,1382. |
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| Authors: | WANG Zheng-qin ZHU Xiang-bin |
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| Affiliation: | 1.Computer Department, Anhui business college, Wuhu 241000;2.Department of Electronics and Information Engineering Anhui normal university, Wuhu 241000 |
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| Abstract: | An FPGA-based design of 32 bit floating-point FFT processor is presented.The device of Virtex-2 ISE6.2I of Xilinx was used, Based on radix-2 decimation-in-time algorithm, the program was synthesized and simulated by Software tools of Modelsim.The result of simulation was compared with that of Matlab,which show that the speed of FFT realized by FPGA was so high that it can be applied to such fields where high-speed process was needed. |
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| Keywords: | FPGA FFT Radix-2 decimation-in-time ISE |
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