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吊放声纳多处理器并行处理系统硬件设计
引用本文:陶林伟,王英民,王成,牛奕龙.吊放声纳多处理器并行处理系统硬件设计[J].声学技术,2007,26(6):1129-1134.
作者姓名:陶林伟  王英民  王成  牛奕龙
作者单位:西北工业大学航海学院,西安,710072
摘    要:本文利用TI公司的TMS320VC5409系统DSP设计了吊放声纳数据处理硬件系统。充分使用DSP上的McBSP,作为多处理单元之间的数据传输通道,构建了硬件系统结构。系统构成简洁、稳定,并具有很好的扩展性和通用性。同时,使用DMA技术,使数据传输完全在后台进行,极大地提高系统的吞吐量和计算能力。系统设计符合现代硬件系统发展方向,可以满足大多数据吊放声纳的处理过程。

关 键 词:吊放声纳  多通道缓冲串口  多机通讯  串行总线  直接存储访问  低压差分信号
文章编号:1000-3630(2007)-06-1129-06
收稿时间:2007-07-13
修稿时间:2007-10-21

Hardware design of multi-processors' parallel processing system for dipping sonar
TAO Lin-wei,WANG Ying-min,WANG Cheng and NIU Yi-long.Hardware design of multi-processors'''' parallel processing system for dipping sonar[J].Technical Acoustics,2007,26(6):1129-1134.
Authors:TAO Lin-wei  WANG Ying-min  WANG Cheng and NIU Yi-long
Abstract:The Texas Instruments' Incorporated's TMS320VC5409 DSP is used to design the hardware of a data processing system for dipping sonar. By using three McBSPs on a chip as data paths between multi-processors, we construct the a brief and stable structure of the hardware system with good expansibility and universality is constructed. Simultaneously, throughput and processing ability of this system are increased greatly by the use of DMA technique, which transmits or receives data without intervention caused by the CPU. Furthermore, the design idea is coincident with the modem hardware development, and the system can accommodate most of dipping sonar processing instances for dipping sonar.
Keywords:dipping sonar  multichannel buffered serial ports  multi-processors communicate  serial bus  direct memory access  low voltage difference signal  
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