| 双边沿触发计数器的设计和应用 |
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| 引用本文： | 谢建华,叶卫东,韩跃峰.双边沿触发计数器的设计和应用[J].兵工自动化,2006,25(4):71-72. |
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| 作者姓名： | 谢建华 叶卫东 韩跃峰 |
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| 作者单位： | 北京航空航天大学,自动化科学与电气工程学院,北京,100083;陆军航空兵学院,机载系,北京,101114 |
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| 摘 要： | 双边沿触发计数器由偶数、奇数加法计数器及数据选择器组成.两个加法计数器在时钟信号作用下并行工作,交替处于计数和保持状态.数据选择器则将两个计数器中处于保持状态的奇偶数据交替输出,实现双边沿触发加法计数器的功能.该触发计数器采用Verilog语言设计和软件仿真,可用于计数、定时和分频三种情况.
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| 关 键 词： | 计数器 双边沿触发 并行处理 选择器 |
| 文章编号： | 1006-1576（2006）04-0070-02 |
| 收稿时间： | 2005-09-13 |
| 修稿时间： | 2005-11-20 |
Design and Application of Double Edge Trigger Counter |
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| XIE Jian-hua,YE Wei-dong,HAN Yue-feng.Design and Application of Double Edge Trigger Counter[J].Ordnance Industry Automation,2006,25(4):71-72. |
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| Authors: | XIE Jian-hua YE Wei-dong HAN Yue-feng |
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| Abstract: | Double Edge Trigger Counter is composed of odd counter, even counter and data selector. The two addition counters were worked paralleled under the clock signals and each counter was worked alternately in counting state and keeping state. Data selector alternately to realize the functions of double edge trigger addition counter output the odd and even data in two counters. The counter was designed by Verilog Language and software simulation. It can be used in counting, timing and frequency dividing. |
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| Keywords: | Counter Double edge trigger Parallel processing Selector |
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