Local/global planarization of polysilicon micropatterns by selectivity controlled CMP |
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Authors: | Woonki Shin Sungmin Park Hyoungjae Kim Sukbae Joo and Haedo Jeong |
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Affiliation: | (1) Department of Material Science and Engineering, Technion-Israel Institute of Technology, 32000 Haifa, Israel; |
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Abstract: | The planarization CMP, which is considered as one of the most important ULSI chip, is introduced to make flat surface in patterned
areas for multilevel MEMS devices. However, the conventional CMP is limited in its application to MEMS structures, due to
their wide patterns of μm to mm order thick film layer of several μm. A new CMP process has been developed for application
to MEMS structures by the control of selectivity between polysilicon and silicon oxide. A 30nm thick protective oxide layer
is deposited to protect the recessed areas, and then polished with low selectivity slurry to partially remove the protruded
area while suppressing the removal rate of the recessed area. During the second step of the new CMP process, high selectivity
slurry is used to minimize the dishing amount and the variation in the step height according to pattern size and density.
Experimental results showed that dishing amount was less than 30nm at the largest pattern of 1250 μm in width and showed no
variation of entire pattern, which meant local and global planarization. This result suggests that the newly developed selectivity
controlled CMP process can be successfully applied for fabrication the multilevel MEMS devices. |
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Keywords: | Chemical mechanical polishing(CMP) MEMS Selectivity Polysilicon Dishing |
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