Design of a 75‐nW, 0.5‐V subthreshold complementary metal–oxide–semiconductor operational amplifier |
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| Authors: | Luca Magnelli Francesco A. Amoroso Felice Crupi Gregorio Cappuccino Giuseppe Iannaccone |
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| Affiliation: | 1. DMCE – Danube Mobile Communications Engineering GmbH & Co KG, Linz, Austria;2. Dipartimento di Elettronica, Informatica e Sistemistica, Università della Calabria, via P. Bucci 42C, Arcavacata di Rende, CS, Italy;3. Dipartimento di Ingegneria dell'Informazione: Elettronica, Informatica e Telecomunicazioni, Università di Pisa, via G. Caruso 16, Pisa, PI, Italy |
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| Abstract: | This work focuses on the subthreshold design of ultra low‐voltage low‐power operational amplifiers. A well‐defined procedure for the systematic design of subthreshold operational amplifiers (op‐amps) is introduced. The design of a 0.5‐V two‐stage Miller‐compensated amplifier fabricated with a 0.18‐µm complementary metal–oxide–semiconductor process is presented. The op‐amp operates with all transistors in subthreshold region and achieves a DC gain of 70 dB and a gain–bandwidth product of 18 kHz, dissipating just 75 nW. The active area of the chip is ≈0.057 mm2. Experimental results demonstrate that well‐designed subthreshold op‐amps are a very attractive solution to implement sub‐1‐V energy‐efficient applications for modern portable electronic systems. A comparative analysis with low‐voltage, low‐power op‐amp designs available in the literature highlights that subthreshold op‐amps designed according to the proposed design procedure achieve a better trade‐off among speed, power, and load capacitance. Copyright © 2013 John Wiley & Sons, Ltd. |
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| Keywords: | operational amplifier subthreshold circuit low power low voltage CMOS analog design |
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