| 嵌入式微处理器片上调试系统的设计和验证 |
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| 引用本文： | 龚令侃,卢景芬. 嵌入式微处理器片上调试系统的设计和验证[J]. 计算机工程, 2008, 34(Z1) |
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| 作者姓名： | 龚令侃 卢景芬 |
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| 作者单位： | 华东计算技术研究所,上海,200233 |
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| 摘 要： | 为了尽可能保持芯片原有体系结构,综合基于软件监控和基于JTAG的2种方法,提出扩展嵌入式处理器片|=调试系统的完整解决方案.该系统包括PC端的开发环境IDE、命令转发与控制子系统Probe和支持JTAG标准的目标CPU等部分.通过软硬件协同设计和验证,确保系统划分正确,子系统协调工作,并缩短了调试系统的开发周期.
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| 关 键 词： | 嵌入式微处理器 片上调试系统 软硬件协同设计和验证 |
Design and Verification of On-chip Debug System on Embedded Microprocessor |
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| GONG Ling-kan,LU Jing-fen. Design and Verification of On-chip Debug System on Embedded Microprocessor[J]. Computer Engineering, 2008, 34(Z1) |
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| Authors: | GONG Ling-kan LU Jing-fen |
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| Affiliation: | GONG Ling-kan,LU Jing-fen (East China Institute of Computer Technology,Shanghai 200233) |
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| Abstract: | With limited modification of the original architecture,this paper proposes a solution that combines the existing software-monitor-based and JTAG-based approaches to extend the embedded microprocessor with on-chip debug system.The system consists of an integrated development environment on host PC,a probe subsystem transferring and controlling commands and a target CPU that supports JTAG standard.It assures the correctness of system partition and the behavior of subsystems through a software/hardware co-desi... |
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| Keywords: | embedded microprocessor on-chip debug system software/hardware co-design and co-verification |
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