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Monolithic 3D CMOS Using Layered Semiconductors
Authors:Angada B. Sachid  Mahmut Tosun  Sujay B. Desai  Ching‐Yi Hsu  Der‐Hsien Lien  Surabhi R. Madhvapathy  Yu‐Ze Chen  Mark Hettick  Jeong Seuk Kang  Yuping Zeng  Jr‐Hau He  Edward Yi Chang  Yu‐Lun Chueh  Ali Javey  Chenming Hu
Affiliation:1. Electrical Engineering and Computer Sciences, University of California, Berkeley, CA, USA;2. Material Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, CA, USA;3. Berkeley Sensor and Actuator Center, University of California, Berkeley, CA, USA;4. Department of Material Sciences and Engineering, National Chao‐Tung University, Hsinchu, Taiwan;5. Computer, Electrical and Mathematical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal, Saudi Arabia;6. Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu, Taiwan;7. Joint Center for Artificial Photosynthesis, Lawrence Berkeley National Laboratory, Berkeley, CA, USA
Abstract:
Keywords:metal oxide semiconductors  monolithic 3D integration  transition metal dichalcogenides  ultra‐low voltage operation
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