| 高性能处理系统的软硬件协同设计研究 |
| |
| 引用本文： | 谢菲,张浩. 高性能处理系统的软硬件协同设计研究[J]. 计算机工程与科学, 2009, 31(Z1). DOI: 10.3969/j.issn.1007-130X.2009.A1.007 |
| |
| 作者姓名： | 谢菲 张浩 |
| |
| 作者单位： | 中国科学院计算技术研究所前瞻研究实验室,北京,100190 |
| |
| 摘 要： | x86是目前应用最广泛的复杂指令(CISC)系统,对大量非典型特性进行支持,从而花费大量硬件资源.而非典型特性的支持往往会影响典型功能的效率,不利于硬件资源的优化配置,限制处理系统性能的提升.本文首先分析了x86指令集及x86程序的固有特性,进而提出了一种基于RISC超标量处理系统核心的软硬件协同设计的实现方案.新处理系统的面积仅为采用硬件译码设计的x86处理系统的78.3%,性能达到采用硬件译码设计的x86处理系统的90.6%以上,并有较大的提升空间.
|
| 关 键 词： | 协同设计 超标量 执行模式 热点识别 |
Hardware & Software Co-Design for High Performance System |
| |
| XIE Fei,ZHANG Hao. Hardware & Software Co-Design for High Performance System[J]. Computer Engineering & Science, 2009, 31(Z1). DOI: 10.3969/j.issn.1007-130X.2009.A1.007 |
| |
| Authors: | XIE Fei ZHANG Hao |
| |
| Abstract: | x86 is the most widely used ISA currently, but compared with RISC,is very complex. The obstacles in designing an x86 processing systems (most of them are uncommon characters) need lots of additional hardware resources, and supporting directly with hardware does no good for the utilization of hardware resources. This paper analyzes the characters of x86 ISA and applications deeply, and propose a software/hardware co-design method based on RISC superscalar processing systems. The area of our co-design processing system is about 78.3% of an x86 processing system with hardware decoder, but performance of our design is about 90.6% of the same processing system with hardware decoder. |
| |
| Keywords: | co-design superscalar execution mode hot trace recognition |
| 本文献已被 万方数据 等数据库收录！ |
|
