首页 | 本学科首页   官方微博 | 高级检索  
相似文献
 共查询到18条相似文献,搜索用时 131 毫秒
1.
单级功率因数校正DCM组合变换器的稳定性   总被引:5,自引:1,他引:4  
刘健  刘树林  王兆安 《电子学报》1999,27(10):51-54,69
本文论述在闭环反馈控制下,输入环节工作在不连续导电模式(DCM)时单级功率因数校正(PFC)组合变器的稳定性,讨论通过脉冲宽度调节使变换器的电压能够维持在期望的电压范围之内的条件,以及条件的输入电压主动态范围和负载变化范围,并采用上述方法对一个PFC DCM boost-buck变换器进行了理论分析与实验研究,实验结果结果表明理论分析的正确性。  相似文献   

2.
一种高效开关电容AC—DC变换器   总被引:1,自引:0,他引:1  
刘健  陈治明 《微电子学》1998,28(5):303-306
针对开关电容DC-DC变换器的效率会随着输入电压的增高而显著下降的现象,提出了一种新型的基于开关电容网络的AC-DC变换器,它采用根据输入电压变化而动态确定功率开关的导通和关断的方法,从原理上解决了开关电容DC-DC变换器的输入电压动态范围与变换器效率之间的矛盾。理论分析和实验结果表明,该转换器可以在较宽的输入电压范围获得较高的转换效率。  相似文献   

3.
开关电容DC—DC变换器的设计方法   总被引:5,自引:0,他引:5  
刘健  陈治明 《电子学报》1999,27(4):102-105,119
在对开关电容DC-DC变换器进行稳态分析的基础上,研究了面向设计的几个关键技术问题,提出了开关电容DC-DC变换器的设计方法,并通过了实验和仿真的手段加以验证。  相似文献   

4.
开关电容DC—DC变换器的效率   总被引:6,自引:0,他引:6  
刘健  陈治明 《微电子学》1997,27(1):26-31
将开关电容网络应用到DC-DC变换器,并从能量的角度研究了其效率,得出一个对所有类型的开关电容变换器的适用的公式,提出了改善效率的新的拓扑结构,使升压与降压开关电容变换器有较高的效率,实验结果与计算机模拟均取得了与分析相同的结果。  相似文献   

5.
张国海  高勇 《微电子学》1999,29(4):246-249
对5-12V推挽式开关电容DC-DC变换器的性能进行了理论分析及计算机仿真,结果表明,该结构的输出电流可达1A以上,效率优于75%,输出电压纹波小于20mV,具有高功率密度、便于集成等优点。  相似文献   

6.
严百平  陈治明 《电子学报》1999,27(8):123-125
提出了一种新的具有功率因数补偿(PFC)功能的零电压开关(ZVS)AC-DC变换器基于不连续导电模式(DCM)下的Boost环节实现PFC功能,但其具有ZVS机制从而解决了DCM下因开关关断大的峰值电流引起的关断同、EMI严重的问题,同时还消除了由于开关的寄生电容引起的开通损耗,该变换器可以采用通用控制芯片并工作在PWM模式,文中分析了提出变换器的工作原理,并给出了基本设计原则,模拟和实验结果证明  相似文献   

7.
刘健  陈治明 《微电子学》1996,26(5):325-329
论述了一种可以从+5V电源得到±2V的新型开关电容DC-DC变换器。它的结构中不含电感,因而便于集成,使计算机系统组成和联接简化。  相似文献   

8.
新型集成开关电容DC—DC变换器及其计算机仿真   总被引:1,自引:1,他引:0  
本文介绍了一种新型DC-DC变换器,它具有损耗低、不采用功率电感性元件、体积小、重量轻的优点,非常适合于制作为混合功率集成电路。与一般开关电容变换器相比,它还具有直接反馈控制、电压和电流调整范围宽、对器件参数要求不高、集成后成品率高的优点。文中给出了利用SPICE仿真的电路模型和仿真结果。  相似文献   

9.
本文论述分析一种新型CD-CD变换器-固定频率钳位零电压开并准谐振DC-DC变换器的电路拓扑结构和基本原理,讨论谐振条件,并对电路工作过程进行计算机辅助分析。  相似文献   

10.
多路独立输出的集成谐振DC—DC变换器及其计算机仿真   总被引:1,自引:0,他引:1  
谐振型变换器的结构是一种较理想的混合功率集成电路拓扑结构,但它却难进入多路不均衡负载状态。本文提出了一种新的拓扑结构,这种结构采用借振环节作为输入和输出之间的功率隔离传输器,而在每个输出回路采用开关电容调节器,把各路输出电压稳定在相应的设计动态范围之内,这样即实现了隔离多路独立输出的谐振型DC—DC变换器。它综合了谐振变换器和开关电容变换器的优点,很适合于混合集成。本文介绍了这种新拓扑的原理及SPICE仿真方法。  相似文献   

11.
为了有效降低电流纹波和提高转换器效率,提出一种新型交错并联同相降压升压DC/DC转换器。提出的结构通过采用输入/输出(I/O)磁耦合交错并联和阻尼网络技术,降低了开关的电压应力、内部电压振荡和I/O电流纹波,并提升了转换器的效率。采用状态空间平均法,在连续导通模式下分析了提出转换器的稳态运行,从理论上证明了其优势。样机的功率设置为360W,输出电压为36 V,模拟结果以及实验结果显示,当输出电流为6A时,转换效率最高达到96%,最大输入电流纹波百分比仅为9.4%,相较于其他类似转换器,提出的转换器具有效率较高和I/O电流纹波较低的优势。  相似文献   

12.
A novel bootstrap driver circuit applied to high voltage buck DC–DC converter is proposed. The gate driver voltage of the high side switch is regulated by a feedback loop to obtain accurate and stable bootstrapped voltage. The charging current of bootstrap capacitor is provided by the input power of the DC–DC converter directly instead of internal low voltage power source, so larger driver capability of the proposed circuit can be achieved. The bootstrap driver circuit starts to charge the bootstrap capacitor before the switch node SW drop to zero voltage at high-side switch off-time. Thus inadequate bootstrap voltage is avoided. The proposed circuit has been implemented in a high voltage buck DC–DC converter with 0.6 µm 40 V CDMOS process. The experimental results show that the bootstrap driver circuit provides 5 V stable bootstrap voltage with higher drive capability to drive high side switch. The proposed circuit is suitable for high voltage, large current buck DC–DC converter.  相似文献   

13.
A single-stage single-switch AC–DC integrated converter is proposed in this paper, as a tight DC voltage regulator with unity input power factor for the fundamental component of the input current. Proposed converter is formed by the integration of buck-boost configuration with a buck converter operated by a single switch. The buck-boost section of the proposed configuration is operated in current discontinuous conduction mode (DCM) to get unity input power factor at the supply terminals and the buck section is operated up to boundary current conduction mode (BCM). The features acquired by the converter operating in complete discontinuous conduction mode (DCM) are unity input power factor, zero-current turn-ON for the Switch, fast and good DC output voltage regulation with extensive conversion range and low voltage stress on the switch. Additionally, the intermediate capacitor voltage stress is independent of converter load variations and so the switch also is subjected to constant peak voltage stress. A comprehensive study is carried out to obtain the necessary design equations. A design model is implemented using simulation and hardware. The results confirm the performance of the proposed configuration.  相似文献   

14.
介绍了POSCAP钽电容器的特点和优点,其电容量大、等效串联电阻(ESR)低及允许纹波电流大,最适用于高效率、低电压、大电流降压式DC/DC转换器中作输出电容器。详述了POSCAP钽电容器在由LM2745组成的同步整流降压式DC/DC转换器中的应用实例,介绍应用电路如果使用条件发生改变时,经过简单计算确定有关元器件参数(L,C)的方法。  相似文献   

15.
文章为DC/DC变换器设计了一种自适应模糊逻辑控制器(AFLC)。所提出的AFLC不需要专家系统提供决策参数和控制规则,而是使用模型数据文件来产生参数和规则,该模型数据文件包含输入输出对的整体概况。所提出的控制器使用8位微控制器来实现降压、升压和降压-升压变换器。  相似文献   

16.
开关电容boost—buck功率因数校正组合开关变换器   总被引:1,自引:0,他引:1  
程红丽 《微电子学》2001,31(5):351-353,359
文章提出了一种基于开关电容网络的boost-buck组合开关变换器,当其输入环节工作在不连续导电模式(DCM)时,具有功率因数校正(PFC)功能,详细分析了这类变换器的工作原理、临界条件、输入输出电压变比以及各器件的应力。实验结果与理论分析相符。  相似文献   

17.
A novel CMOS integrated pulse-width modulation (PWM) control circuit allowing smooth transitions between conversion modes in full-bridge based bi-directional DC–DC converters operating at high switching frequencies is presented. The novel PWM control circuit is able to drive full-bridge based DC–DC converters performing step-down (i.e. buck) and step-up (i.e. boost) voltage conversion in both directions, thus allowing charging and discharging of the batteries in mobile systems. It provides smooth transitions between buck, buck-boost and boost modes. Additionally, the novel PWM control loop circuit uses a symmetrical triangular carrier, which overcomes the necessity of using an output phasing circuit previously required in PWM controllers based on sawtooth oscillators. The novel PWM control also enables to build bi-directional DC–DC converters operating at high switching frequencies (i.e. up to 10?MHz and above). Finally, the proposed PWM control circuit also allows the use of an average lossless inductor-current sensor for sensing the average load current even at very high switching frequencies. In this article, the proposed PWM control circuit is modelled and the integrated CMOS schematic is given. The corresponding theory is analysed and presented in detail. The circuit simulations realised in the Cadence Spectre software with a commercially available 0.18?µm mixed-signal CMOS technology from UMC are shown. The PWM control circuit was implemented in a monolithic integrated bi-directional CMOS DC–DC converter ASIC prototype. The fabricated prototype was tested experimentally and has shown performances in accordance with the theory.  相似文献   

18.
This paper describes recent advances in power semiconductor devices, integrated circuits, and packages for DC/DC converter applications. Special emphasis is placed on the latest discrete power MOSFET devices and packages. Features and trends in ICs for control of synchronous buck converters are highlighted as well. The paper will also cover a new class of miniaturized hybrid assembly that sets new efficiency standards for high current low output voltage applications.  相似文献   

设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号