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1.
首次给出了一种具有规律性的能用来提高镍硅化物热稳定性的方法.依据此方法,摸索出在Ni中分别以夹层金属掺入Pt、Mo、Zr、W金属来提高NiSi硅化物的热稳定性.概括总结了掺人难熔金属M后形成的三元镍硅化物Ni(M)Si热稳定性能.实验结果表明,Ni(M)Si硅化物薄膜四种镍硅化物薄膜有相同的热稳定性.以Ni/W/Ni/...  相似文献   

2.
黄伟  张树丹  许居衍 《电子学报》2011,39(11):2502-2506
本文首次给出了一种具有规律性的能用来提高镍硅化物热稳定性的方法.依据此方法,首次摸索出在Ni中掺入夹层金属Ta来提高NiSi硅化物的热稳定性.Ni/Ta/Ni/Si样品经600 ~ 800℃快速热退火后,薄层电阻率保持较小值,约2Ω□.XRD衍射分析结果表明,在600~800℃快速热退火温度下形成的Ni(Ta)S薄膜中...  相似文献   

3.
报道了控制热处理过程中含氢非晶硅中纳米硅颗粒大小的一种新方法。用喇曼散射、X射线衍射和计算机模拟,发现在非晶硅中所形成的纳米硅颗粒的大小,随着热退火过程中升温速率的变化而变化。在退火过程中,若非晶硅薄膜升温速率较高(~100℃/s),则所形成纳米硅粒的大小在1.6~15nm;若非晶硅薄膜升温速率较低(~1℃/s),则纳米硅粒大小在23~46nm。根据晶体生长理论,讨论了升温速率的高低与所形成的纳米硅颗粒大小的关系。  相似文献   

4.
盛捷  罗军  吕亮  赵志远  肖志强 《微电子学》2019,49(2):270-274
硅化镍(NiSi)因具备低硅耗、低电阻率、低热预算、没有明显线宽效应等特性,被广泛应用于源漏极接触部分和栅极与金属的接触部分中。工艺中,加热条件的变化会导致生成不同的Ni基硅化物,均一性也会根据加热方式产生变化,影响器件的性能。对先导工艺中Ni基硅化物在不同工艺流程里不同的固相反应进行了对比分析,研究了低温浸入式退火加高温尖峰退火以及低温浸入式退火加高温激光退火这两种方法对生成Ni基硅化物的影响,发现硅化物电阻值主要取决于低温浸入式退火的温度,硅化物均一性主要取决于高温退火方式。该研究结果对实际工艺加工有参考作用。  相似文献   

5.
蒋葳  刘云飞  尹海洲 《微电子学》2014,(2):245-248,201
随着MOSFET的特征尺寸进入20nm技术节点,源漏接触电阻成为源漏寄生电阻的主导部分,后栅工艺对硅化物的高温特性提出了更高的要求。分析了Ni/Ti/Si结构在不同温度退火下形成的硅化物的薄膜特性和方块电阻。分别采用J-V和C-V方法,提取硅化物与n-Si(100)接触的势垒高度。Ni/Ti/Si结构形成的镍硅化物在高温下具有良好的薄膜特性,并且可以得到低势垒的肖特基接触。随着退火温度的升高,势垒高度逐渐降低。研究了界面态的影响,在低于650℃的温度下退火,界面态密度随退火温度升高而逐渐增大,高于750℃后,界面电荷极性翻转。  相似文献   

6.
通过研究超薄Ni0.86Pt0.14金属硅化物薄膜的特性,提出采用310℃/60 s与480℃/10 s两步快速热退火(RTA)的工艺方案,形成的Ni(Pt)硅化物薄膜电阻率最小,均匀性最好,且在600℃依然保持形态稳定。应用此退火条件,Ni0.86Pt0.14在0.5μm和22 nm CMOS结构片中形成覆盖均匀且性能良好的金属硅化物薄膜,同时没有形成任何尖峰。对于更薄的硅化物,实验结果表明,2 nm Ni0.86Pt0.14形成的超薄硅化物界面平整,均匀性好,没有在界面出现Ni0.95Pt0.05金属硅化物的"倒金字塔形"尖峰。结果显示,比较在有、无氩离子轰击的硅表面形成的两种Ni(Pt)Si硅化物薄膜,后者比前者电阻率约低10%~26%,该工艺有望在未来超薄硅化物制作被广泛应用。  相似文献   

7.
《电子与封装》2017,(6):41-44
首次提出在Ni中掺入夹层W的方法来提高NiSi的热稳定性。具有此结构的薄膜,经600~800℃快速热退火后,薄层电阻保持较低值,小于2Ω/。经Raman光谱分析表明,薄膜中只存在NiSi相,而没有NiSi2生成。Ni(W)Si的薄层电阻由低阻转变为高阻的温度在800℃以上,比没有掺W的镍硅化物转变温度的上限提高了100℃。Ni(W)Si/Si肖特基势垒二极管能够经受650~800℃不同温度的快速热退火,肖特基接触特性良好,肖特基势垒高度为0.65 eV,理想因子接近于1。  相似文献   

8.
利用在线应力测试技术表征了掺入Pt后对镍硅化物薄膜应力性质的影响.通过改变NiSi薄膜中Pt含量以及控制热处理的升温、降温速率实时测量了薄膜应力,发现在Si(100)衬底上生长的纯NiSi薄膜和纯PtSi薄膜的室温应力主要是热应力,且分别为775MPa和1.31GPa,而对于Ni1-xPtxSi合金硅化物薄膜,室温应力则随着Pt含量的增加而逐渐增大.应力随温度变化曲线的分析表明,Ni1-xPtxSi合金硅化物薄膜的应力驰豫温度随Pt含量的增加,从440℃(纯NiSi薄膜)升高到620℃(纯PtSi薄膜).应力驰豫温度的变化影响了最终室温时的应力值.  相似文献   

9.
利用在线应力测试技术表征了掺入Pt后对镍硅化物薄膜应力性质的影响.通过改变NiSi薄膜中Pt含量以及控制热处理的升温、降温速率实时测量了薄膜应力,发现在Si(100)衬底上生长的纯NiSi薄膜和纯PtSi薄膜的室温应力主要是热应力,且分别为775MPa和1.31GPa,而对于Ni1-xPtxSi合金硅化物薄膜,室温应力则随着Pt含量的增加而逐渐增大.应力随温度变化曲线的分析表明,Ni1-xPtxSi合金硅化物薄膜的应力驰豫温度随Pt含量的增加,从440℃(纯NiSi薄膜)升高到620℃(纯PtSi薄膜).应力驰豫温度的变化影响了最终室温时的应力值.  相似文献   

10.
采用15nmNi/1.5nmPt/15nmNi/Si结构在600~850°C范围内经RTP退火的方法形成Ni(Pt)Si薄膜,其薄膜电阻低且均匀一致。比形成较低电阻率的NiSi薄膜的温度提高了150°C。在850°CRTP退火后形成的Ni(Pt)Si/Si肖特基势垒二极管I-V特性很好,其势垒高度ΦB为0.71eV,改善了肖特基二极管的稳定性。实验表明在肖特基二极管中引入深槽结构,可以大幅度地提高其反向击穿电压。在外延层浓度为5E15cm-3时,深槽器件的击穿电压可以达到80V,比保护环器件高约30V。  相似文献   

11.
Reaction characteristics of ultra-thin Ni films (5 nm and 10 nm) on undoped and highly doped (As-doped and B-doped) Si (100) substrates are investigated in this work. The sheet resistance (Rs) measurements confirm the existence of a NiSi salicidation process window with low Rs values within a certain annealing temperature range for all the samples except the one of Ni(5 nm) on P+-Si(100) substrate (abnormal sample). The experimental results also show that the transition reaction to low resistivity phase NiSi is retarded on highly doped Si substrates regardless of the initial Ni film thickness. Micro-Raman and x-ray diffraction (XRD) measurement show that NiSi forms in the process window and NiSi2 forms in a higher temperature annealing process for all normal substrates. Auger electron spectroscopy (AES) results for the abnormal sample show that the high resistivity of the formation film is due to the formation of NiSi2.  相似文献   

12.
It is reported that the thermal stability of NiSi is improved by employing respectively the addition of a thin interlayer metal (W, Pt, Mo, Zr) within the nickel film. The results show that after rapid thermal annealing (RTA) at temperatures ranging from 650 °C to 800 °C, the sheet resistance of formed ternary silicide Ni(M)Si was less than 3 Ω/□, and its value is also lower than that of pure nickel monosilicide. X-ray diffraction (XRD) and raman spectra results both reveal that only the Ni(M)Si phase exists in these samples, but the high resistance NiSi2 phase does not. Fabricated Ni(M)Si/Si Schottky barrier devices displayed good I-V electrical characteristics, with the barrier height being located generally between 0.65 eV and 0.71 eV, and the reverse breakdown voltage exceeding to 40 V. It shows that four kinds of Ni(M)Si film can be considered as the satisfactory local connection and contact material.  相似文献   

13.
In this paper, solid state reactions of titanium with boron and phosphorus doped Si0.7Ge0.3 alloys have been investigated for application in a self-aligned germanosilicide process. Wet chemical etching of the germanosilicide with respect to unreacted Ti in a solution of 1:1:5 NH4OH:H2O2:H2O has been investigated. Characterization was performed using four-point probe sheet resistance measurements, x-ray diffraction, cross-sectional transmission electron microscopy, Nomarski optical imaging, and scanning electron microscopy. The C54 Ti(Si1−yGey)2 phase was observed to form for reactions on both boron and phosphorus doped Si0.7Ge0.3 alloys. Grain structures of the C54 phases were found to be similar to grain structures of intrinsic alloy reactions with lateral grain dimensions on the order of 0.3 Μm. Resistivities of 22 ΜΩ-cm have been determined for the boron and phosphorus reactions. Although the germanosilicide phases were observed to etch slowly in 1:1:5 NH4OH:H2O2:H2O, which is conventionally used in the self-aligned titanium silicide process, the much higher etch rate of titanium nitride compounds and unreacted Ti provided for a self-aligned germanosilicide process. A first anneal in a nitrogen ambient was found to be necessary to eliminate lateral silicidation over surrounding oxide during self-aligned germanosilicide formation.  相似文献   

14.
We have studied the effect of substrates [glass and Si(1 0 0)], of Ni thickness (tNi) and of the deposition rate [v1=13 nm/min and v2=22 nm/min] on the structural and electrical properties of evaporated Ni thin films. The Ni thickness, measured by the Rutherford backscattering (RBS) technique, ranges from 28 to 200 nm. From X-ray diffraction, it was found that all samples are polycrystalline and grow with the 〈1 1 1〉 texture. From the measure of the lattice constant, we inferred that Ni/Si samples are under a higher tensile stress than the Ni/glass ones. Moreover, in Ni/glass deposited at v1, stress is relived as tNi increases while those deposited at v2 are almost stress-free. The grain size (D) in Ni/glass with low deposition rate monotonously increases (from 54 to 140 Å) as tNi increases and are lower than those corresponding to Ni/Si. On the other hand, samples grown at v2 have a constant D, for small tNi with D in Ni/glass larger than D in Ni/Si. Ni/glass deposited at low v1 are characterized by a higher electrical resistivity (ρ) than those deposited at v2. For the latter series, ρ is practically constant with tNi but decreases with increasing grain size, indicating that diffusion at the grain boundaries rather than surface effect is responsible for the variation of ρ in this thickness range. For the Ni/glass deposed at v1 and the Ni/Si series, ρ has a more complex variation with thickness and deposition rate. These results will be discussed and correlated.  相似文献   

15.
对掺杂浓度为1017~1019cm-3的GaN:Si样品进行高精度X射线衍射和拉曼散射光谱的研究发现:随着Si掺杂浓度的增加,GaN晶粒尺寸逐渐减小,引发更多的螺位错和混合位错致使摇摆曲线的半高宽有所增加,同时薄膜中的剩余应力也逐渐减小。当掺杂浓度高于2.74×1018cm-3时,薄膜从压力状态转变为张力状态。  相似文献   

16.
The direct deposition of a thin Al or B layer at Ni/Si interface was proposed as a new method to solve a problem of degraded thermal stability of Ni silicide on heavily doped N+-Si substrates. Significant improvement of thermal stability evaluated by the sheet resistance vs. silicidation temperature properties was observed. The improvement is attributed to suppression of agglomeration of the silicide layers. The Al layer was effective only when it was located at the Ni/Si interface before the silicidation process. The deposited Al and B layers under Ni layer segregated at the surface after the silicidation process. The use of B layer was preferable to control the phase transition from NiSi to NiSi2.  相似文献   

17.
In this paper, a novel raised p+−n junction formation technique is presented. The technique makes use ofin- situ doped, selectively deposited Si0.7Ge0.3 as a solid diffusion source. In this study, the films were deposited in a tungsten halogen lamp heated cold-walled rapid thermal processor using SiCl2H2, GeH4, and B2H6. The microstructure of the Si0.7Ge0.3 layer resembles that of a heavily defected epitaxial layer with a high density of misfit dislocations, micro-twins, and stacking faults. Conventional furnace annealing or rapid thermal annealing were used to drive the boron from thein- situ doped Si0.7Ge0.3 source into silicon to form ultra-shallow p+−n junctions. Segregation at the Si0.7Ge0.3/Si interface was observed resulting in an approximately 3:1 boron concentration discontinuity at the interface. Junction profiles as shallow as a few hundred angstroms were formed at a background concentration of 1017 cm−3.  相似文献   

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