一种具有传输零点的Hairpin带通滤波器设计

本文通过在微带（hairpin）滤波器的谐振器上并联微带开路线，构成了一种新的hairpin带通滤波器。该滤波器在通带附近有一对传输零点，具有良好的频率响应以及频率选择特性。由于这种类型的微带滤波器实现传输零点不需要通过滤波器非相邻谐振器间的交叉耦合来获得，因此，设计过程非常简单。     

一种具有陷波特性的超宽带带通滤波器

针对超宽带(UWB)系统易受窄带信号干扰问题,本文提出了一种新颖的带陷波特性的UWB带通滤波器,该带通滤波器由两级交指梳状耦合谐振器级联而成.通过在交指梳状耦合谐振器的一端添加非对称的开路负载,使该滤波器具有了通带内陷波特性.合理地调整开路负载的长度和宽度可以对通带内的任意频段进行抑制.本文设计的UWB带通滤波器工作频段为3.1～10.6GHz,陷波频段为5.8～5.9GHz,抑制电平达到-40dB.仿真结果和测试结果吻合较好,验证了设计的正确性.     

同轴腔带通滤波器的一种设计方法

采用负阻线子网络…构造了多腔耦合的同轴带通滤波器电路模型，应用电路分析软件对滤波器进行了分析优化，得到腔体之间耦合系数和接入点位置。应用三维全波分析软件，分析了腔体结构参数与耦合系数和耦合窗的关系。以这种路和场的仿真、优化相结合的方法，得出了滤波器的耦合和输入输出结构参数。运用该方法设计的中心频率2．4GHz，通带100MHz的六腔滤波器的实际测试结果与仿真分析结果基本一致。     

28GHz新型介质谐振器带通滤波器

本文介绍一种轴对称结构新型介质谐振器带通滤波器,其中心频率为28.72GHz,带内插入损耗0.74dB,带外衰减33dB,该滤波器体积仅为常用的平行结构滤波器的1/4。     

一种新型单块双频带通介质滤波器

为了得到质量小、品质因数(Q)值高和低温漂系数低的小型双频带通滤波器,提出了一种基于单块小型介质滤波器的设计方案。该滤波器由介质腔体和矩形介质谐振器组合而成,谐振器和腔体由同种材料构成,腔体内部不需要其他固定谐振器的措施,腔体外表面镀上一层金属银。通过用限元模拟软件法对滤波器结构进行仿真优化,得到滤波器的两个中心频率分别为3.18GHz和3.78GHz,两个频带的3dB带宽分别为60 MHz和23 MHz,在中心频率处回波损耗均低于-30dB。     

一种新型传输零点可控的微带带通滤波器

提出了一种新型的传输零点可控的微带带通滤波器结构,它由一段低阻抗线和与之相连的平行耦合线构成。通过调节低阻抗线与平行耦合线的偶模阻抗比,可以改变谐振器的2个模式之间的距离,从而灵活的调节滤波器的带宽;而通过调节平行耦合线的间距,则可以方便的调节传输零点的位置。仿真与实测结果都表明该滤波器具有良好的性能：低插损,结构紧凑,可以灵活的调节带宽和传输零点的位置。     

一种新型的T型双模微带带通滤波器

提出了一种新型的T型双模微带带通滤波器结构,即在T型谐振器的两侧通过交叉耦合结构和加载开路支节,分别实现了在通带外的低阻带产生一个传输零点和高阻带产生了两个衰减极点,提高了阻带的抑制能力,同时保证了滤波器的小型化。该滤波器的仿真结果表明,通带的中心频率为3.1GHz,最大回波损耗优于-40dB,最小插入损耗为-0.1dB,实测和仿真结果相一致。     

具有双陷波特性的超宽带带通滤波器

采用修改的多模谐振器(MMR)结构,通过输入输出端开槽形成交叉耦合,实现了一种结构紧凑的超宽带(UWB)带通滤波器。修改的多模谐振器在通带中能产生两个奇模、三个偶模,加载的阶跃阻抗开路枝节在通带的两边产生两个传输零点,提高了边缘选择性。同时在滤波器下方耦合双模阶跃阻抗谐振器形成具有双陷波特性超宽带带通滤波器,利用HFSS13.0验证。结果表明:该滤波器通带在2.61~11.21 GHz,其陷波频率分别发生在5.61,7.81 GHz,能有效抑制WLAN和X频段卫星通信系统对超宽带通信系统的影响,可适用于超宽带无线通信系统。     

滤波器耦合槽直径对其性能的影响仿真

采用高频结构模拟软件模拟1／4λ同轴型带通微波陶瓷滤波器结构,讨论了耦合槽直径对滤波器的性能如带宽、插损、带内波动、阻带抑制等的影响。结果表明,随着耦合槽直径的增大,滤波器中心频率、插入损耗和阻带抑制减小,3dB带宽增大。讨论结果表明,可通过调整滤波器耦合槽直径的大小,得到理想性能的介质滤波器。     

高阻带微波带通滤波器的研制

为了提高通信设备的性能,研制了高阻带的微波滤波器。该滤波器由5个高Q值的同轴介电陶瓷谐振器构成的带通滤波器。谐振器之间通过介电基片上的电容相互耦合。在装入外壳前,调整好每个谐振器的谐振频率和耦合电容,之后就不需要再调整,外壳上也没有可调零件,从而保证滤波器结构稳定,性能可靠。用εr=74的介电陶瓷制作出滤波器的性能为f0=982 MHz,Δf=10.9 MHzI,L=3.8 dB,阻带在f0±30 MHz处大于69 dB,远阻带衰减优于70 dB。     

零点可控的1／4波长谐振器滤波器

基于微带耦合线零点产生原理,并结合奇偶模分析方法,设计了一种零点可控的1／4波长谐振器滤波器,其工作中心频率为2GHz,零点频率为3．06GHz,带宽为190MHz。微带谐振器的长度为中心频率1／4波长,其中耦合长度为零点频率处1／4波长。研究结果表明该滤波器可以通过调节谐振器的耦合长度实现有限频率的传输零点的控制。与传统的滤波器相比,此滤波器具有结构尺寸小,零点可独立控制的优越性。     

一种新型高性能LC带通滤波器的设计

为适应现代机载宽频通信设备对其滤波器的严格要求,在继承了传统滤波器设计理论的基础上,设计了一种新型带通滤波器电路结构。通过适当的网络变换,使原有集中参数的椭圆函数滤波器电路网络成为能够适应高频工作并已经吸收了寄生参量的稳定结构。试验结果表明:该滤波器具有低的插损、高矩形系数、优良的电压反射系数和长时间承受连续波大功率的高性能。     

源与负载感性交叉耦合的小型介质滤波器

为了提高滤波器的阻带衰减,研究了源与负载感性交叉耦合的小型介质滤波器。首次提出一种新概念：将源和负载看作准谐振器。以贴片电感作为源与负载之间、源与第二个谐振器之间的交叉耦合元件,两个准谐振器和两个介质谐振器可构成级联四节(CQ),一个准谐振器和两个介质谐振器可构成级联三节(CT)。分析了传输零点的位置,详细讨论了这种滤波器结构的设计方法。采用介电常数为80的介质陶瓷组装了3个两级介质滤波器,并进行测试,结果表明传输零点的个数和位置与仿真设计相符合。滤波器的体积小,均为14 mm×6.5 mm×10 mm。     

Design of Current-Mode Square-Root Domain Band-Pass Filter with Reduced Voltage

A design technique for current-mode square-root domain band-pass filter fabricated in a 0.25 μ m CMOS process is presented. The basic building block consists of current-mode current mirrors, square-root circuits and capacitors, and in which the overall supply voltage is reduced by adopting low-voltage level-shift current mirror. Both of the simulation and measured results, which are in good agreement, indicate that the prototype of the band-pass provides tunable center frequency of 4–10 MHz with bias-current-tunable, −26.7 dB total harmonic distortion (THD), and approximately 1.598 mW power dissipation with a 1.5 V supply voltage. Advantages of the proposed filter include high frequency operation, tuneability, low supply voltage operation, low power consumption, and low third order intermodulation distortion. Gwo-Jeng Yu was born in Kaohsiung, Taiwan, R.O.C., in 1954. He received the B.S. and M.S. degrees in the Department Electronic Engineering in 1972 and 1976, respectively, from National Chiao Tung University, HsinChu, Taiwan, R.O.C., and he is currently working toward the Ph.D. degree in the Department of Electrical Engineering of National Cheng Kung University, Tainan, Taiwan, R.O.C. Since 1978, he has been on the Faculty of Institute of Cheng Shiu Technology, Kaohsiung, Taiwan, R.O.C., where he is currently a Associate Professor in the Department of Electronic Engineering. During 1979–1990, he was the Chairman of the Electronic Engineering Department and the Chairman of the Microelectronics and Information Technology Center during 1996–2000. His current researches include current-mode circuits design, analog IC design and VLSI circuit design. Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from the National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of the Department of Electronic Engineering. His current researches include current-mode circuits design, VLSI design, analog IC design, and analog IP design. Jenn-Jiun Chen received the B.S. and M.S. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 2001 and 2003, respectively. His research interests are design and modeling of current mode circuit, low power analog circuit design, current mode filters, and instrumental amplifier in micro sensor applications. He received Chip Design Award from the Chip Implementation Center, National Applied Research Laboratories, in 2002. Bin-Da Liu received the B.S., M.S., and Ph.D. degrees all in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1973, 1975, and 1983, respectively. Since 1977 he has been on the faculty of the National Cheng Kung University, where he is currently Distinguished Professor in the Department of Electrical Engineering and Director of the SoC Research Center. During 1983–1984, he was a Visiting Assistant Professor in the Department of Computer Science, University of Illinois at Urbana-Champaign. During 1988–1992, he was the Director of Electrical Laboratories, National Cheng Kung University. He was the Associate Chair of the Electrical Engineering Department during 1996–1999 and the Chair during 1999–2002. Since 1995 he has been a consultant of the Chip Implementation Center, National Applied Research Laboratories. He has published more than 190 technical papers. He also contributed chapters in the book Neural Networks and Systolic Array Design (D. Zhang Ed. Singapore: World Scientific Publisher, 2002) and the book Accuracy Improvements in Linguistic Fuzzy Modeling (J. Casillas, O. Cordn, F. Herrera, and L. Magdalena Eds. Heidelberg, Germany: Springer-Verlag, 2003). He is currently a CAS Associate Editor of the IEEE Circuits & Devices Magazine and an Associate Editor of the IEEE Transactions on Circuits and Systems-I. His current research interests include low power circuit design, SoC system integration and verification, and VLSI implementation for fuzzy-neural networks and audio/video signal processors.     

交叉耦合盒式结构微带带通滤波器设计

设计了一种交叉耦合盒式结构微带带通滤波器。采用耦合矩阵方法对交叉耦合盒式结构带通滤波器频率响应特性进行了分析,并且在此基础上研制了一种基于E型双模谐振器的非对称响应带通滤波器。滤波器中心频率为6.4 GHz,带宽为0.8 GHz,最小带内插损为1.9 dB,两个传输零点分别位于4.5 GHz 和7.6 GHz,上下阻带抑制度分别大于35dB、47dB。滤波器有效尺寸约为0.34λg *0.43λg。该滤波器具有结构紧凑、带外抑制度高、选择性高的优点。     

采用新型可调谐有源电感的频率可调谐高Q低噪声的带通滤波器

对采用双回转结构交叉耦合差分有源电感(DGC-DAI)的可调谐、高品质因子Q和低噪声差分有源带通滤波器(THQLNA-BPF)进行了研究。输入级,采用差分共基-共射结构,以抑制噪声和获得高频特性;输出级,采用差分共集放大器,以获得高的驱动能力和高的隔离度;有源电感滤波网络,利用DAI电感值可宽范围调谐、高Q值和低的噪声,来分别实现BPF的中心频率的宽范围调节、高Q值和良好的噪声特性;进一步地,利用变容二极管网络改善BPF中心频率的可调性和提高Q值,利用有源可调负阻网络提高BPF的Q值和进行Q值独立调节。基于WIN 0.2μm GaAs HBT工艺,利用ADS对THQLNA-BPF进行性能验证。结果表明:中心频率可在1.68 GHz~4.32 GHz范围内调谐,调谐量达2.64 GHz;最大和最小Q分别达到83.6和33.6;噪声范围为6.04 dB~8.83 dB;在中心频率为3.69 GHz时,输入1 dB压缩点为-7.3 dBm,稳定系数μ>1;静态功耗小于18 mW。     

介质同轴谐振器的频率测试方法

介绍了一种测量介质同轴谐振器频率的新方法，即在谐振器的开路端串联一高品质因数Q电容，用标量网络分析仪测出其串联谐振频率，从而得出谐振器的频率。该方法操作简单，对仪表的要求不高，适合于规模生产，特别适合于介质滤波器的调试。