Simple method to determine microwave phase

The Kramers-Kronig transform is used to calculate the phase of a reflection coefficient once the frequency dependence of its magnitude is measured. The calculated values agree quite satisfactorily with the measured results, thus making it feasible to use this method in practice to determine microwave phase.     

Simple method to determine the main Gunn domain parameters

A simple analytical method to determine the maximum field, outside field and excess voltage of a stable domain is put forward for any values of the carrier concentration, sample length and bias. This method provides good agreement with the exact solutions, for both stable-domain and transient processes in Gunn diodes.     

集成电路低功耗设计方法

信息化的社会发展无法离开电子产品的不断进步,而其对其低功耗的设计要求正在不断增强.但当前电子产品的功能质量在提高的同时,其功耗设计却没能跟上设计的要求,一直处于上升趋势,这将对电子产品性能的提高产生一定的影响.一款经久耐用、性能强的电子产品必须具备水平相当的低功耗设计方式.本文主要探讨了集成电路的低功耗设计方法,以作为相关参考.     

集成电路低功耗设计方法

针对当前集成电路低功耗的需求,对当前几种常用的低功耗设计方法和技术进行探讨,包括算法优化、工艺优化、版图优化、门级优化等,从而为当前继承电路优化提供借鉴参考。     

A new pinched-off cold-FET method to determine parasiticcapacitances of FET equivalent circuits

A new pinched-off cold FET method to extract the parasitic capacitances of FETs is proposed in this paper. The method is based on a physically meaningful depletion-layer model and the theoretical analysis of the two-port network for the pinched-off cold FETs. The parasitic gate capacitance (C_pg) and the parasitic drain capacitance (C _pd) of FETs are extracted using the linear regression technique associated with the frequency responses of Y-parameters. The extraction method can be applied to the small-signal equivalent-circuit modeling of the FETs including MESFETs, heterojunction FETs, and high-electron-mobility transistors. According to the new analytical method, the simulated S-parameters exhibit great agreement with the measured S-parameters for the equivalent-circuit models of FETs     

A method to predict harmonic distortion in small-geometry MOS analog integrated circuits

A method to predict the small-signal linear gain and level of harmonic distortion in analog MOS circuits is presented. This method, based on a generalized nonlinear transfer function approach, lends itself to implementation in the AC small-signal analysis routine of the circuit simulation program SPICE. A low-frequency nonlinear distortion model based on the CSIM simulator MOSFET model is applied to three simple MOSFET circuits. Results presented emphasize the need to consider small-signal quantities in the development of MOSFET models and in the determination of device parameters. The method can be easily extended to include capacitive effects and a prediction of intermodulation distortion.     

Simple method for obtaining the equations of switched-capacitor circuits

A systematic method for writing the time-domain equations of switched-capacitor circuits is presented. By following four well-defined steps, as many linearly independent equations are obtained as there are capacitors in the circuit. The method is especially well suited for hand analysis, and relies on the intuitively appealing concept of identifying physical regions where charge is trapped.     

Simple method of asynchronous circuits implementation in commercial FPGAs

This paper presents a simple implementation method of pipelined asynchronous circuits, suitable for commercial field programmable gate arrays (FPGAs). Contrary to other existing asynchronous design techniques, the presented method does not require the application of additional user actions such as constraining or building hard macros. As a design example, an architecture of the asynchronous PicoBlaze compatible microcontroller and 12-bit pipelined fast array multiplier have been considered. The developed synchronous and asynchronous versions of the microcontroller as well as fast array multiplier have been implemented and tested using Xilinx FPGAs, and then compared in terms of the area requirement, power consumption and performance.     

Simple nonparaxial beam-propagation method for integrated optics

A simple beam-propagation method for solving the scalar TE nonparaxial or Helmoltz equation is presented. This versatile algorithm, based on a two-step finite-difference scheme for solving the propagation coordinate, is amenable to be easily extended to solve vector wave equations, which could take into account nonlinear effects. In addition, a general procedure to check its stability is given in detail. The applicability of the present method and its distinction from paraxial or Fresnel solutions are demonstrated through several examples, including very strongly guided structures of variable transverse section     

A numerical integration-based yield estimation method for integrated circuits

A novel integration-based yield estimation method is developed for yield optimization of integrated circuits.This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal,the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation(BCT).In order to reduce the estimation variances of the model parameters of the density function,orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations.The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed.Two yield estimation examples,a fourth-order OTA-C filter and a three-dimensional(3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values.Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases.Therefore,our method is more suitable for parametric yield optimization.     

一种基于数值积分的集成电路成品率估计方法

本文提出了一种基于数值积分的集成电路成品率估计方法。该方法通过直接在可接受域上对性能的联合概率密度函数进行积分获得成品率的估计。为达到此目的,性能的仿真数据须先经由Box-Cox变换 (BCT) 转化为服从多变量正态分布的数据。同时,文中采用了基于正交表的改进拉丁超立方体抽样法 (OA-MLHS) 对电路的工艺扰动参数实施抽样,如此可以大幅减小联合概率密度函数中分布参数的估计方差。文中对结合使用OA-MLHS与BCT从而减少了分布参数的估计方差的数学原理进行了分析。以一个四阶OTA-C低通滤波器和一个三维二次函数的成品率估计为例,在不同的样本量及成品率水平的组合下,对包含拉丁超立方体抽样和重要抽样等的六种不同的成品率估计法做了性能比较。大量的仿真证明本文所述的方法无论在精度还是效率上都要优于其他几种方法。因此,该方法更加适用于集成电路的成品率优化。     

Low-loss bandpass filter using higher mode strip line for millimetre-wave integrated circuits

A technique to construct a low-loss printed bandpass filter was demonstrated by using a higher mode strip line at 30 GHz. A three-pole, 0.1 dB Chebyshev ripple bandpass filter with a 2% relative bandwidth was designed and fabricated. The insertion loss was found to be 0.7 dB.     

Simple graphical method for calculating the efficiency of bulk negative-resistance microwave oscillators

A graphical method is given for calculating the efficiency of a bulk negative-resistance microwave oscillator. It is shown that, for a square-wave r.f. signal, InP 3-level oscillators should have an efficiency of over 20% at fields only twice threshold, and In0.2Ga0.8Sb oscillators should give an efficiency of over 35%     

Calculation of transients on unsymmetrical multiconductor line systems using the graphical method

The `graphical method? previously discussed for transient calculation in single-conductor transmission-line systems is generalised for unsymmetrical multiconductor lines having N conductors. The solution equations are expressed in a form suitable for digital programming.     

Thermal resistance of VCSELs bonded to integrated circuits

The thermal resistance of vertical-cavity surface-emitting lasers (VCSELs) flip chip bonded to GaAs substrates and CMOS integrated circuits has been measured. The measurements on GaAs show that if the bonding is done properly, the bonding does not add significantly to the thermal resistance. However, the SiO₂ under the CMOS bonding pad can double the thermal resistance unless measures are taken to improve the thermal conductance of these layers. Finite element simulations indicate that the thermal resistance of bonded VCSELs increases rapidly as the solder bond size and the aperture size decrease below ~10 μm     

A new fabricating method of planar Gunn-effect devices and integrated circuits

A new method for the fabrication of Schottky gate planar Gunn-effect devices and circuits has been developed, whereby gate contacts with small geometrical dimensions and improved electrical characteristics are produced. This method is carried out simply and with a high yield. A monolithic integration of these devices has been demonstrated.     

Coupling and crosstalk between high speed interconnects inultralarge scale integrated circuits

The advent of sophisticated lithographic techniques has made it possible to fabricate densely packed ultra-large-scale-integrated (ULSI) circuits. In these chips, interconnect lines are so narrow and spaced in such close proximity that signal from one line could easily get coupled to another, causing interference and crosstalk. A general theory to model coupling between optical interconnects (waveguides) and quantum-mechanical coupling between narrow and very closely spaced silicide interconnects embedded in dielectrics (SiO₂) is presented