共查询到19条相似文献,搜索用时 171 毫秒
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《可编程控制器与工厂自动化(PLC FA)》2015,(4):20-21
泓格科技发布M-7024U/M-7024UD4通道输入输出模块泓格科技发布的M-7024U/M-7024UD是一个多功能模块:提供4通道Source型模拟量输出、4通道数字量输入和4通道数字量输出功能。在模拟量输出通道上提供多种输出范围可经由软件设定, 相似文献
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为了实现对磁场测量仪器进行计量检定,设计并实现一种高准确度的磁场发生器标准装置。该装置采用磁屏蔽技术,设计了坡莫合金材料制作的多层屏蔽结构,形成了标准磁环境;设计由数模转换器(DAC)、互导放大器、CPU、输出控制电路、直流基准电源、消磁电流源、显示器和键盘等外围设备组成的数字式磁场控制器,磁场控制器控制通过加勒特线圈的电流以达到输出标准磁场的目的。该装置将模拟量转换成数字量,产生的标准磁场具有高分辨率和高准确度的特点。 相似文献
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介绍了一种基于西门子S7-200PLC和人机电子MT510T触摸屏的高频直流电源监控器的设计.监控器采用12位A/D模拟量采样模块对电力直流系统的电流、电压等模拟量进行采集处理,利用PID调节算法产生调节量,由模拟量输出通道产生0~10V的直流电压量控制高频整流模块的输出电压、电流,实现闭环控制,从而完成对高频直流电源的实时监控. 相似文献
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DDS(直接数字合成)技术被广泛应用于任意波形信号的产生,但由于受RAM和DAC器件工作速度的限制,制约了输出波形频率的提高。本文针对高速任意波形发生器的设计与实现,提出了一种通过分相存储和并串转换以解决RAM速度限制、通过多路DAC并行伪插值技术解决了DAC转换速率限制的高速波形合成方法,并讨论了两种方法的综合应用,给出了采样频率2GSPS的任意波形发生器的原理方案。最后通过500MSPS任意波形合成实验,验证了该方法的有效性和工程应用价值。 相似文献
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In this paper, a soft-start circuit is present to prevent the large surge current and overshoot voltage to improve the reliability of the DC-DC converter. The proposed structure generates the step-shaped soft-start voltage through 7 bits DAC. Combining with the PWM comparator, the soft-start circuit controls the system duty cycle directly. The mechanism of the soft-start acts as the high clamp function, which eliminates the need of the clamp circuit. A DC-DC buck converter with the proposed soft-start circuit is based on a 0.4 μm BCD process for verification Hspice simulation shows that under the condition with 3.6 V input voltage, 1.8 V output voltage and 600 mA load current, the soft-start is achieved. After 1.2 ms of the soft-start time, the operation turns to stable. 相似文献
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Yung‐Hui Chung Chia‐Wei Yen Pei‐Kang Tsai 《International Journal of Circuit Theory and Applications》2018,46(4):748-763
This paper presents an energy‐efficient 12‐bit successive approximation‐register A/D converter (ADC). The D/A converter (DAC) plays a crucial role in ADC linearity, which can be enhanced by using larger capacitor arrays. The binary‐window DAC switching scheme proposed in this paper effectively reduces DAC nonlinearity and switching errors to improve both the spurious‐free dynamic range and signal‐to‐noise‐and‐distortion ratio. The ADC prototype occupies an active area of 0.12 mm2 in the 0.18‐μm CMOS process and consumes a total power of 0.6 mW from a 1.5‐V supply. The measured peak differential nonlinearity and integral nonlinearity are 0.57 and 0.73 least significant bit, respectively. The ADC achieves a 64.7‐dB signal‐to‐noise‐and‐distortion ratio and 83‐dB spurious‐free dynamic range at a sampling rate of 10 MS/s, corresponding to a peak figure‐of‐merit of 43 fJ/conversion‐step. 相似文献
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利用AT89C51单片机强大的可编程功能和硬件接口实现用按键或串口调整系统的输出,以达到控制输出电压的目的。输出部分由数码管显示和DA转换器输出两部分组成。数模转换芯片在单片机的输出端采样,将采样转换的结果输出,并且数码管显示单元把输出结果显示出来。电压的调节精度0.05 V,显示精度达到0.01 V。除了PC机与单片机的串口通信实现对单片机的输入之外,还可以通过编码过的按键实现对单片机的输入控制,输入的数据就是要显示和转换出来的数据。设计的特色是:输入方式多,输入操作简单灵活,输出精度高,性能稳定,经济和携带方便等。 相似文献
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Mahdi Momeni Mohammad Yavari 《International Journal of Circuit Theory and Applications》2020,48(11):1873-1886
In this paper, a switching scheme is presented to reduce the capacitive digital-to-analog converter (DAC) switching energy, area, and the number of switches in successive approximation register (SAR) analog-to-digital converters (ADCs). In the proposed DAC switching method, after a few most significant bits (MSBs) decision, the sampled differential input signal is shifted into two special regions where the required DAC switching energy and area is less than the other regions. This technique can be utilized in most of the previously reported DAC switching schemes to further reduce the capacitive DAC switching energy and area. The conventional and two recently presented DAC switching techniques are utilized in the proposed SAR ADC to evaluate its usefulness. 相似文献