并行单型规范分片线性函数极坐标数字预失真器

介绍了一种并行的基于单型规范分片线性（SCPWL）函数的极坐标数字预失真器模型。首先根据分片线性拟合原理引入绝对值型的单型规范分片线性函数,建立模型解析方程并推导出模型参数的最小二乘解,然后根据模型特点设计了数字预失真器的并行实现架构,并对模型架构的工作顺序和参数提取过程进行了介绍。仿真结果表明SCPWL极坐标预失真器远远优于传统的功率回退线性化技术,且与常用的复多项式预失真器相比较,尤其是在过饱和非线性失真情况下,其线性补偿能力要优于后者。     

仿射投影自适应算法在数字预失真系统中的应用

基于自适应滤波器的仿射投影算法,结合复数增益查找表结构,建立预失真系统模型.研究了步长参数和多重约束数对仿射投影算法收敛速率的影响;比较了仿射投影算法和归一化最小均方算法的性能.结果表明,在取值范围内的步长参数和多重约束数越大,仿射投影算法收敛速率越快;相同迭代次数、步长参数和正则化系数时,偏离归一化载波中心频率5 MHz处,仿射投影算法的系统邻信道功率比达到-59.3 dB,效果好于归一化最小均方算法的-44.2 dB.     

基于数字预失真技术的功放线性化研究

无线通信系统中,由于功放本身的非线性失真,导致信号带外产生频谱,限制了数据速率和频谱利用率。通过分析功放非线性原理,针对无记忆和记忆两种功放行为模型,提出分别采用查找表算法和最小二乘与最小均方误差相结合的算法进行线性优化。在Matlab环境下创建数字基带预失真链路模型。仿真结果表明,预失真器对两种模型中功率谱密度的改善分别达到39dB和15dB,提高了功放效率,降低了邻道干扰。针对不同功放类型的线性化进行对比研究讨论,并选择出适合不同功放的最优算法,具有较好的预失真效果,为设计实际功放线性化电路具有指导意义。     

基于多项式模型的功率放大器非线性特性和预失真分析

信号在功放过程中,会产生非线性失真.因此对信号首先进行预失真处理是改善功放的非线性失真一种重要技术手段.对无记忆和有记忆的功放模型和预失真模型进行建模.利用多项式模型对功放模型进行建模,利用多项式模型和有约束优化问题来对预失真模型进行建模.对于无记忆信号,最终得到一个7次多项式的功放模型和7次多项式的预失真模型,线性化后最大可能的幅度放大倍数为1.83.对于有记忆信号,得到一个次数为5、记忆长度为3的多项式功放模型和次数为5、记忆长度为3的多项式预失真模型,线性化后最大可能的幅度放大倍数为9.48.     

基于MATLAB和ADS的数字预失真系统仿真

介绍了数字预失真的基本原理,设计了1个预失真系统,并进行了MATLAB和ADS联合仿真,验证了系统的线性化程度.根据软件仿真,预失真系统改善输出信号的ACPR达20dB以上,设计的数字预失真模块对功放的线性度改善效果明显.     

Doherty功放的数字预失真技术研究

通信系统中功率放大器（PA）的效率和线性度影响着整个系统的性能,而Doherty技术是提高效率的一种有效方式,但在提高效率的同时,它的线性度也会变差。数字预失真（DPD）是一种最具有前景的线性化技术,近年来各种模型被不断提出。通过在一种合适阶数、记忆深度的记忆多项式DPD中采用新的RLS与LMS混合算法,实现Doherty功放（DPA）快速、高效的线性化。仿真结果表明所提算法能够快速收敛,对系统的非线性和记忆效应有明显改善。     

组合结构设计的双频带数字预失真方法

双频带射频功放的数字预失真技术(DPD)要求支持更宽的带宽.为了保证功放输出的线性指标并降低预失真系统的实现开销,设计一种组合结构的双频带宽带数字预失真方法.该方法采用一维整频带数字预失真模型与四个一维分频带数字预失真模型的组合结构来综合处理双频带的发射信号.仿真实验结果表明,采用90 MHz的双频带LTE信号,临道泄露比(ACLR)指标较改进的二维记忆多项式DPD有1 dB提升,与二维DPD有0.5 dB差别,满足系统指标要求.     

功放的数字基带预失真系统研究与仿真

为了克服功率放大器的非线性失真和满足制定的功率谱密度要求,数字基带预失真技术以其良好的线性度、宽带宽、高效率和全自适应性等优点成为解决功率放大器非线性失真的问题.文中在详细地分析数字基带预失真系统原理和单位延迟抽头多项式模型的基础上,提出了具有记忆效应的数字基带预失真电路,并在ADS环境中实现了系统级仿真.仿真结果表明,系统对功率谱密度的改善最大能达到30dBm,具有很好的预失真效果.故构建的系统级仿真电路对实际的数字预失真系统设计起着重要的指导作用.     

数字基带自适应预失真算法设计及仿真实现

从算法的递归方式、收敛速度和三阶互调失真改善效果方面考虑,对各种自适应算法做了详细的分析,完成了数字基带自适应预失真算法的设计。Matlab仿真结果表明,以自适应预失真算法为核心的数字基带预失真功放较线性化之前三阶互调失真改善12dB。     

基于反馈迭代的双带功率放大器数字预失真

为补偿双带功率放大器中的非线性,提出了二维多项式模型并结合反馈迭代法建立数字预失真系统。相比于传统的线性化技术,二维数字预失真方法降低了对数/模转换器和模/数转换器的要求。仿真结果表明,采用间隔频率为100 MHz的两路WCDMA信号同时驱动功率放大器,二维多项式模型能够更好地消除非线性失真,反馈迭代方法在求逆上更精确。     

数字基带预失真系统中环路延迟估计的FPGA实现

基于FPGA芯片Stratix Ⅱ EP2S60F672C4设计实现了数字基带预失真系统中的环路延迟估计模块.该模块运用了一种环路延迟估计新方法,易于FPGA实现.同时,在信号失真的情况下也能给出正确的估计结果.Modelsim SE 6.5c的时序仿真结果和SignalTaps Ⅱ的硬件调试结果验证了模块的有效性.     

New estimation and compensation method for quadrature modulator and demodulator errors in digital predistortion system

This article proposes a new method to estimate and compensate for the in‐phase and quadrature (IQ) imbalance errors of the quadrature modulator (QM) and demodulator (QDM) without interrupting the transmission. It uses two groups of captured signals, which transmit through two feedback loops with different propagation delays, to separate and estimate the IQ imbalance errors. In comparison with the previous methods, the greatest advantage of the proposed method is that both compensators of the QM and QDM can be obtained without additional feedback loop, and then the digital predistorter can be designed without the disturbance of IQ imbalance errors. This method can improve the compensation performance of digital predistortion with lower costs and less complexity. Experimental results show the correctness and effectiveness of the proposed method. © 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2012.     

基于分段线性函数的功放模型及数字预失真应用

为了克服通信系统中功率放大器的非线性和记忆效应,数字预失真技术成为研究的热点。提出一种基于分段线性函数的多项式模型,与广义记忆多项式模型相比,我们把多项式中的高阶项转换为分段求和项,消除了高阶相乘带来的不稳定性,同时由于分段阈值的存在,该模型的适用性和稳定性均有所提高。把功放模型应用于数字预失真结构中的实验结果表明:与广义记忆多项式模型相比,分段线性函数模型所需系数要少40%,邻信道功率比提高约1dB,归一化均方误差提高约8dB,因此该模型在数字预失真方面具有较好的效果。     

One‐bit in‐phase observation for direct learning‐based digital predistortion with modified frequency‐domain delay estimation and alignment

This article proposes a novel digital predistortion (DPD) implementation method for RF power amplifiers. The new approach adopts only one 1‐bit comparator in the feedback path to observe the in‐phase (I) or the quadrature (Q) component of the error signal between the input and the output signals. To this end, the theoretical derivation of the in‐phase observation based on direct learning architecture (DLA) DPD is first given in this article, by combining the existing 1‐bit method and the low‐cost in‐phase observation. To facilitate the delay estimation and alignment, a modified iterative frequency‐domain delay estimation is presented, which only acquires either I or Q components of the output signal to achieve satisfied delay estimation. Experimental results show that the proposed DPD method decreased the normalized mean square error (NMSE) and the adjacent channel power ratio (ACPR) to less than ?42 and ?51 dB, respectively, which indicates that the proposed DPD system can achieve comparable performance as the existing DPD identification techniques with lower implementation complexity.     

Frequency domain data based model extraction for band‐limited digital predistortion of wideband RF power amplifiers

Bandwidth constraints pose significant challenges to linearization of wideband RF power amplifiers (PAs) with digital predistortion (DPD). A recently proposed band‐limited DPD scheme uses a band‐limited modeling technique to eliminate the bandwidth constraints and reduce DPD implementation cost. However, time consuming convolution operations are involved for model extraction in this time domain data based band‐limited modeling method. In this article, band‐limited model extraction is formulated as a generalized least squares problem and investigated from a frequency domain perspective. A frequency domain data based model extraction method is proposed, which greatly reduces the computational complexity for extracting band‐limited DPD model parameters. A 10 W GaN HEMT inverse class‐F PA excited by a 20 MHz four‐carrier WCDMA signal and a 40 MHz two‐carrier LTE signal is tested to validate the method. Experimental results show that the computationally efficient frequency domain data based model extraction method for band‐limited DPD provides as good linearization performance as the time domain data based method. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:412–420, 2014.     

An accurate physical knowledge‐based model for behavioral modeling and digital predistortion of power amplifiers

The objective of this article is to present an accurate model for behavioral modeling and digital predistortion of power amplifiers (PAs) using physical knowledge. Starting with the physically meaningful block model, we present a novel approach to simplify the block model and propose a simplified physical knowledge‐based (SPK) model. The SPK model's performance was experimentally assessed by two types of PAs (a LDMOS Doherty PA and a GaN Doherty PA) and two signals (a single carrier 16QAM signal and a 2‐carrier WCDMA signal). All experimental results prove the superiority of the SPK model. Compared with the 1st‐dynamic deviation reduction (DDR) approach and the 2nd‐simplified DDR approach, the SPK approach achieves average ACPR improvements of 4.4 dB and 2.5 dB, respectively. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE 23: 682–689, 2013.     

An efficient combination of digital predistortion and OFDM clipping for power amplifiers

This article presents a strategy for enhancing efficiency in power amplifiers (PAs) by combining digital predistortion (DPD) linearization and clipping strategies for orthogonal frequency division multiplexing signals in a WiMAX scenario. On the one hand, by reducing the peak‐to‐average power ratio of multicarrier signals using the well‐known clipping technique, it is possible to perform a more efficient PA amplification. On the other hand, nonlinear and linear distortion introduced by the PA operating close to saturation is compensated by the baseband adaptive DPD linearizer. The DPD has to counteract not only the PA nonlinear behavior, but also its dynamics. A test‐bench implementing a WiMAX transmitter was deployed to evaluate the possibilities for enhancing power efficiency while fulfilling the demanded linearity requirements. Experimental results showing the power efficiency and linearity enhancement achieved by the proposed strategy are provided. © 2009 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2009.     

Dynamic deviation reduction‐based concurrent dual‐band digital predistortion

This article introduces the concurrent dual‐band digital predistortion (DPD) architecture with only one upconvertion unit, which is suitable for the linearization of wideband power amplifiers (PAs) excited by concurrent dual‐band signals. By extending the conventional dynamic deviation reduction (DDR) model to the concurrent dual‐band mode, we propose two DDR‐based concurrent dual‐band models, the dual‐band DDR (DB‐DDR) model and the simplified dual‐band DDR (SDB‐DDR) model. The performance of these two models is experimentally assessed with two types of wideband PAs (a GaN Class F PA and a GaN Doherty PA) driven by the concurrent dual‐band signal, and compared with the prior two‐dimensional digital predistortion (2D‐DPD) model and the two‐dimensional modified memory polynomial (2D‐MMP) model. The results prove the good DPD performance and low computational complexity of the proposed models. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:401–411, 2014.     

一种格缩减辅助MIMO检测的组合量化误差校正方法

格缩减技术(LR)可以用于提升多入多出系统(MIMO)线性和非线性检测的性能.采用该方法后会引起检测信号星座图空间的畸变,导致变化后信号取值的非均匀分布和量化错误的易扩散性,会阻碍检测性能的提高.为了进一步提升检测性能,提出奇偶量化的组合量化误差校正方法.仿真结果显示,加入该方法的格缩减辅助检测的性能得到了明显的提升,而且可以很好的逼近最大似然检测(ML)的性能.和目前已知的其它同类量化误差校正方法相比,在实现相同的检测性能提升时,本文提出的组合量化误差校正方法增加的候选矢量减少了一半,即增加的运算复杂度最低.     

宽带数字信号精确时延实现

数字信号的精确时延在信号处理领域有着广泛的应用,特别是实序列时延的实现,在工程实践中有着重要的意义。提出了基于线性移不变系统实现精确延时的方法并进行了性能分析,并指出了工程设计要点;根据信号的时延与其频谱的对应关系,给出了基于线性相位加权的频域实现方法。通过时延误差、系统的频率响应和引入总体平均误差参数对不同方法的性能进行了比较。实验结果表明,这两类方法具有延时精度高,实现方便等优点。