High Performance Multi‐Level Non‐Volatile Polymer Memory with Solution‐Blended Ferroelectric Polymer/High‐k Insulators for Low Voltage Operation

Polymer ferroelectric‐gate field effect transistors (Fe‐FETs) employing ferroelectric polymer thin films as gate insulators are highly attractive as a next‐generation non‐volatile memory. Furthermore, polymer Fe‐FETs have been recently of interest owing to their capability of storing data in more than 2 states in a single device, that is, they have multi‐level cell (MLC) operation potential for high density data storage. However, among a variety of technological issues of MLC polymer Fe‐FETs, the requirement of high voltage for cell operation is one of the most urgent problems. Here, a low voltage operating MLC polymer Fe‐FET memory with a high dielectric constant (k) ferroelectric polymer insulator is presented. Effective enhancement of capacitance of the ferroelectric gate insulator layer is achieved by a simple binary solution‐blend of a ferroelectric poly(vinylidene fluoride‐co‐trifluoroethylene) (PVDF‐TrFE) (k ≈ 8) with a relaxer high‐k poly(vinylidene‐fluoride–trifluoroethylene–chlorotrifluoroethylene) (PVDF‐TrFE‐CTFE) (k ≈ 18). At optimized conditions, a ferroelectric insulator with a PVDF‐TrFE/PVDF‐TrFE‐CTFE (10/5) blend composition enables the discrete six‐level multi‐state operation of a MLC Fe‐FET at a gate voltage sweep of ±18 V with excellent data retention and endurance of each state of more than 10⁴ s and 120 cycles, respectively.     

Low Voltage and Ferroelectric 2D Electron Devices Using Lead‐Free BaxSr1‐xTiO3 and MoS2 Channel

Coupling between non‐toxic lead‐free high‐k materials and 2D semiconductors is achieved to develop low voltage field effect transistors (FETs) and ferroelectric non‐volatile memory transistors as well. In fact, low voltage switching ferroelectric memory devices are extremely rare in 2D electronics. Now, both low voltage operation and ferroelectric memory function have been successfully demonstrated in 2D‐like thin MoS₂ channel FET with lead‐free high‐k dielectric Ba_xSr_1‐xTiO₃ (BST) oxides. When the BST surface is coated with a 5.5‐nm‐ultrathin poly(methyl methacrylate) (PMMA)‐brush for improved roughness, the MoS₂ FET with BST (x = 0.5) dielectric results in an extremely low voltage operation at 0.5 V. Moreover, the BST with an increased Ba composition (x = 0.8) induces quite good ferroelectric memory properties despite the existence of the ultrathin PMMA layer, well switching the MoS₂ FET channel states in a non‐volatile manner with a ±3 V low voltage pulse. Since the employed high‐k dielectric and ferroelectric oxides are lead‐free in particular, the approaches for applying high‐k BST gate oxide for 2D MoS₂ FET are not only novel but also practical towards future low voltage nanoelectronics and green technology.     

Semitransparent,Flexible, and Self‐Powered Photodetectors Based on Ferroelectricity‐Assisted Perovskite Nanowire Arrays

Transparent and flexible photodetectors hold great promise in next‐generation portable and wearable optoelectronic devices. However, most of the previously reported devices need an external energy power source to drive its operation or require complex fabrication processes. Herein, designed is a semitransparent, flexible, and self‐powered photodetector based on the integrated ferroelectric poly(vinylidene‐fluoride‐trifluoroethylene) (P(VDF‐TrFE)) and perovskite nanowire arrays on the flexible polyethylene naphthalate substrate via a facile imprinting method. Through optimizing the treatment conditions, including polarization voltage, polarization time, and the concentration of P(VDF‐TrFE), the resulting device exhibits remarkable detectivity (7.3 × 10¹² Jones), fast response time (88/154 µs) at zero bias, as well as outstanding mechanical stability. The excellent performance is attributed to the efficient charge separation and transport originating from the highly oriented 1D transport pathway and the polarization‐induced internal electric field within P(VDF‐TrFE)/perovskite hybrid nanowire arrays.     

Non‐volatile Ferroelectric Poly(vinylidene fluoride‐co‐trifluoroethylene) Memory Based on a Single‐Crystalline Tri‐isopropylsilylethynyl Pentacene Field‐Effect Transistor

A new type of nonvolatile ferroelectric poly(vinylidene fluoride‐co‐trifluoroethylene) (P(VDF‐TrFE)) memory based on an organic thin‐film transistor (OTFT) with a single crystal of tri‐isopropylsilylethynyl pentacene (TIPS‐PEN) as the active layer is developed. A bottom‐gate OTFT is fabricated with a thin P(VDF‐TrFE) film gate insulator on which a one‐dimensional ribbon‐type TIPS‐PEN single crystal, grown via a solvent‐exchange method, is positioned between the Au source and drain electrodes. Post‐thermal treatment optimizes the interface between the flat, single‐crystalline ab plane of TIPS‐PEN and the polycrystalline P(VDF‐TrFE) surface with characteristic needle‐like crystalline lamellae. As a consequence, the memory device exhibits a substantially stable source–drain current modulation with an ON/OFF ratio hysteresis greater than 10³, which is superior to a ferroelectric P(VDF‐TrFE) OTFT that has a vacuum‐evaporated pentacene layer. Data retention longer than 5 × 10⁴ s is additionally achieved in ambient conditions by incorporating an interlayer between the gate electrode and P(VDF‐TrFE) thin film. The device is environmentally stable for more than 40 days without additional passivation. The deposition of a seed solution of TIPS‐PEN on the chemically micropatterned surface allows fabrication arrays of TIPS‐PEN single crystals that can be potentially useful for integrated arrays of ferroelectric polymeric TFT memory.     

Enhancement of Electrical Properties of Ferroelectric Polymers by Polyaniline Nanofibers with Controllable Conductivities

Conductive nanofibers are adopted to enhance the electric properties of ferroelectric polymers. Polyaniline (PANI) nanofibers doped by protonic acids have a high dispersion stability in vinylidene fluoride‐trifluoroethylene copolymers [P(VDF‐TrFE)] and lead to percolative nanocomposites with enhanced electric responses. About a 50‐fold rise in the dielectric constant of the ferroelectric polymer matrix has been achieved. Percolation thresholds of the nanocomposites are relevant to doping levels of PANI nanofibers and can be as low as 2.9 wt% for fully doped nanofibers. The interface between the conductive nanofiber and the polymer matrix plays a crucial role in the dielectric enhancement of the nanocomposites in the vicinity of the percolation threshold. Compared with other dopants, perfluorosulfonic acid resin is better at improving the performance of the nanofibers in that it serves as a surface passivation layer for the conductive fillers and suppresses leakage current at low frequency. The nanofibers drastically reduce the electric field strength required to switch spontaneous polarization of P(VDF‐TrFE). The nanocomposites can be utilized for potential applications as high energy density capacitors, thin‐film transistors, and non‐volatile ferroelectric memories.     

Ultrahigh‐Performance Flexible and Self‐Powered Photodetectors with Ferroelectric P(VDF‐TrFE)/Perovskite Bulk Heterojunction

Flexible and self‐powered perovskite photodetectors attract widespread research interests due to their potential applications in portable and wearable optoelectronic devices. However, the reported devices mainly adopt an independent layered structure with complex fabrication processes and high carrier recombination. Herein, an integrated ferroelectric poly(vinylidene‐fluoride‐trifluoroethylene) (P(VDF‐TrFE)) and perovskite bulk heterojunction film photodetector on the polyethylene naphthalate substrate is demonstrated. Under the optimum treatment conditions (the polarization voltage and time, and the concentration of P(VDF‐TrFE)), the photodetector exhibits a largely enhanced performance compared to the pristine perovskite device. The resulting device exhibits ultrahigh performance with a large detectivity (1.4 × 10¹³ Jones) and fast response time (92/193 µs) at the wavelength of 650 nm. The improved performance is attributed to the fact that the polarized P(VDF‐TrFE)/perovskite hybrid film provides a stronger built‐in electric field to facilitate the separation and transportation of photogenerated carriers. These findings provide a new route to design self‐powered photodetectors from the aspect of device structure and carrier transport.     

High‐Performance Top‐Gated Organic Field‐Effect Transistor Memory using Electrets for Monolithic Printed Flexible NAND Flash Memory

High‐performance top‐gated organic field‐effect transistor (OFET) memory devices using electrets and their applications to flexible printed organic NAND flash are reported. The OFETs based on an inkjet‐printed p‐type polymer semiconductor with efficiently chargeable dielectric poly(2‐vinylnaphthalene) (PVN) and high‐k blocking gate dielectric poly(vinylidenefluoride‐trifluoroethylene) (P(VDF‐TrFE)) shows excellent non‐volatile memory characteristics. The superior memory characteristics originate mainly from reversible charge trapping and detrapping in the PVN electret layer efficiently in low‐k/high‐k bilayered dielectrics. A strategy is devised for the successful development of monolithically inkjet‐printed flexible organic NAND flash memory through the proper selection of the polymer electrets (PVN or PS), where PVN/‐ and PS/P(VDF‐TrFE) devices are used as non‐volatile memory cells and ground‐ and bit‐line select transistors, respectively. Electrical simulations reveal that the flexible printed organic NAND flash can be possible to program, read, and erase all memory cells in the memory array repeatedly without affecting the non‐selected memory cells.     

A High‐k Fluorinated P(VDF‐TrFE)‐g‐PMMA Gate Dielectric for High‐Performance Flexible Field‐Effect Transistors

A newly synthesized high‐k polymeric insulator for use as gate dielectric layer for organic field‐effect transistors (OFETs) obtained by grafting poly(methyl methacrylate) (PMMA) in poly(vinylidene fluoride‐trifluoroethylene) (P(VDF‐TrFE)) via atom transfer radical polymerization transfer is reported. This material design concept intents to tune the electrical properties of the gate insulating layer (capacitance, leakage current, breakdown voltage, and operational stability) of the high‐k fluorinated polymer dielectric without a large increase in operating voltage by incorporating an amorphous PMMA as an insulator. By controlling the grafted PMMA percentage, an optimized P(VDF‐TrFE)‐g‐PMMA with 7 mol% grafted PMMA showing reasonably high capacitance (23–30 nF cm^?2) with low voltage operation and negligible current hysteresis is achieved. High‐performance low‐voltage‐operated top‐gate/bottom‐contact OFETs with widely used high mobility polymer semiconductors, poly[[2,5‐bis(2‐octyldodecyl)‐2,3,5,6‐tetrahydro‐3,6‐dioxopyrrolo [3,4‐c]pyrrole‐1,4‐diyl]‐alt‐[[2,2′‐(2,5‐thiophene)bis‐thieno(3,2‐b)thiophene]‐5,5′‐diyl]] (DPPT‐TT), and poly([N,N′‐bis(2‐octyldodecyl)‐naphthalene‐1,4,5,8‐bis(dicarboximide)‐2,6‐diyl]‐alt‐5,5′‐(2,2′‐bithiophene)) are demonstrated here. DPPT‐TT OFETs with P(VDF‐TrFE)‐g‐PMMA gate dielectrics exhibit a reasonably high field‐effect mobility of over 1 cm² V^?1 s^?1 with excellent operational stability.     

High‐Performance Piezoelectric,Pyroelectric, and Triboelectric Nanogenerators Based on P(VDF‐TrFE) with Controlled Crystallinity and Dipole Alignment

Poly(vinylidenefluoride‐co‐trifluoroethylene) (P(VDF‐TrFE)), as a ferroelectric polymer, offers great promise for energy harvesting for flexible and wearable applications. Here, this paper shows that the choice of solvent used to dissolve the polymer significantly influences its properties in terms of energy harvesting. Indeed, the P(VDF‐TrFE) prepared using a high dipole moment solvent has higher piezoelectric and pyroelectric coefficients and triboelectric property. Such improvements are the result of higher crystallinity and better dipole alignment of the polymer prepared using a higher dipole moment solvent. Finite element method simulations confirm that the higher dipole moment results in higher piezoelectric, pyroelectric, and triboelectric potential distributions. Furthermore, P(VDF‐TrFE)‐based piezoelectric, pyroelectric, and triboelectric nanogenerators (NGs) experimentally validate that the higher dipole moment solvent significantly enhances the power output performance of the NGs; the improvement is about 24% and 82% in output voltage and current, respectively, for piezoelectric NG; about 40% and 35% in output voltage and current, respectively, for pyroelectric NG; and about 65% and 75% in output voltage and current for triboelectric NG. In brief, the approach of using a high dipole moment solvent is very promising for high output P(VDF‐TrFE)‐based wearable NGs.     

Fully Transparent Non‐volatile Memory Thin‐Film Transistors Using an Organic Ferroelectric and Oxide Semiconductor Below 200 °C

A fully transparent non‐volatile memory thin‐film transistor (T‐MTFT) is demonstrated. The gate stack is composed of organic ferroelectric poly(vinylidene fluoride‐trifluoroethylene) [P(VDF‐TrFE)] and oxide semiconducting Al‐Zn‐Sn‐O (AZTO) layers, in which thin Al₂O₃ is introduced between two layers. All the fabrication processes are performed below 200 °C on the glass substrate. The transmittance of the fabricated device was more than 90% at the wavelength of 550 nm. The memory window obtained in the T‐MTFT was 7.5 V with a gate voltage sweep of ?10 to 10 V, and it was still 1.8 V even with a lower voltage sweep of ?6 to 6 V. The field‐effect mobility, subthreshold swing, on/off ratio, and gate leakage currents were obtained to be 32.2 cm² V^?1 s^?1, 0.45 V decade^?1, 10⁸, and 10^?13 A, respectively. All these characteristics correspond to the best performances among all types of non‐volatile memory transistors reported so far, although the programming speed and retention time should be more improved.     

Temperature‐Dependent Electrical Transport in Polymer‐Sorted Semiconducting Carbon Nanotube Networks

The temperature dependence of the electrical characteristics of field‐effect transistors (FETs) based on polymer‐sorted, large‐diameter semiconducting carbon nanotube networks is investigated. The temperature dependences of both the carrier mobility and the source‐drain current in the range of 78 K to 293 K indicate thermally activated, but non‐Arrhenius, charge transport. The hysteresis in the transfer characteristics of FETs shows a simultaneous reduction with decreasing temperature. The hysteresis appears to stem from screening of charges that are transferred from the carbon nanotubes to traps at the surface of the gate dielectric. The temperature dependence of sheet resistance of the carbon nanotube networks, extracted from FET characteristics at constant carrier concentration, specifies fluctuation‐induced tunneling as the mechanism responsible for charge transport, with an activation energy that is dependent on film thickness. Our study indicates inter‐tube tunneling to be the bottleneck and implicates the role of the polymer coating in influencing charge transport in polymer‐sorted carbon nanotube networks.     

Simulation of current-voltage characteristics of a ferroelectric field-effect transistor

Current-voltage (I-V) characteristics of an all-perovskite ferroelectric-semiconductor field-effect transistor (FET) were simulated. The modeling is based on an analysis of an experimental hysteresis loop of a metal-ferroelectric-metal structure. The charge in the semiconductor, electric fields in the semiconductor and ferroelectric (FE), and FE polarization at the FE-semiconductor interface are calculated at a given semiconductor surface potential. The Poisson equation is solved numerically across the FE thickness. The semiconductor surface potential, semiconductor charge, FE polarization, electric field and voltage drop in the FE are calculated as functions of the applied voltage. By using appropriate semiconductor thickness and built-in voltage between the FE and the gate, it is possible to provide a remanent polarization necessary for the opening and blocking of the FET channel in the ascending and descending portions of the hysteresis loop, respectively. The I-V characteristics and the voltage drop along the FET channel are calculated and analyzed for both polarities of the drain bias. The results make it possible to predict I-V characteristics of an all-perovskite ferroelectric FET.     

Manipulating the Hysteresis in Poly(vinyl alcohol)‐Dielectric Organic Field‐Effect Transistors Toward Memory Elements

The origins of hysteresis in organic field‐effect transistors (OFETs) and its applications in organic memory devices is investigated. It is found that the orientations of the hydroxyl groups in poly(vinyl alcohol) (PVA) gate dielectrics are correlated with the hysteresis of transfer characteristics in pentacene‐based OFETs under the forward and backward scan. The applied gate bias partially aligns the orientations of the hydroxyl groups perpendicular to the substrate as characterized by reflective absorption Fourier transform infrared spectroscopy (RA‐FTIR), in which the field‐induced surface dipoles at the pentacene/PVA interface trap charges and cause the hysteresis. Treating PVA with an anhydrous solvent eliminates the residual moisture in the dielectrics layer, allowing for more effective control of the induced dipoles by the applied gate bias. OFETs of dehydrated‐PVA dielectrics present a pronounced shift of the threshold voltage (ΔV_Th) of 35.7 V in transfer characteristics, higher than that of 18.5 V for untreated devices and results in sufficient dynamic response for applications in memory elements. This work highlights the usage of non‐ferroelectric gate dielectrics to fabricate OFET memory elements by manipulating the molecular orientations in the dielectrics layer.     

Non‐Lithographic Fabrication of All‐2D α‐MoTe2 Dual Gate Transistors

As one of the emerging new transition‐metal dichalcogenides materials, molybdenum ditelluride (α‐MoTe₂) is attracting much attention due to its optical and electrical properties. This study fabricates all‐2D MoTe₂‐based field effect transistors (FETs) on glass, using thin hexagonal boron nitride and thin graphene in consideration of good dielectric/channel interface and source/drain contacts, respectively. Distinguished from previous works, in this study, all 2D FETs with α‐MoTe₂ nanoflakes are dual‐gated for driving higher current. Moreover, for the present 2D dual gate FET fabrications on glass, all thermal annealing and lithography processes are intentionally exempted for fully non‐lithographic method using only van der Waal's forces. The dual‐gate MoTe₂ FET displays quite a high hole and electron mobility over ≈20 cm² V^?1 s^?1 along with ON/OFF ratio of ≈10⁵ in maximum as an ambipolar FET and also demonstrates high drain current of a few tens‐to‐hundred μA at a low operation voltage. It appears promising enough to drive organic light emitting diode pixels and NOR logic functions on glass.     

Flexible and Transparent Nanocomposite of Reduced Graphene Oxide and P(VDF‐TrFE) Copolymer for High Thermal Responsivity in a Field‐Effect Transistor

A new class of temperature‐sensing materials is demonstrated along with their integration into transparent and flexible field‐effect transistor (FET) temperature sensors with high thermal responsivity, stability, and reproducibility. The novelty of this particular type of temperature sensor is the incorporation of an R‐GO/P(VDF‐TrFE) nanocomposite channel as a sensing layer that is highly responsive to temperature, and is optically transparent and mechanically flexible. Furthermore, the nanocomposite sensing layer is easily coated onto flexible substrates for the fabrication of transparent and flexible FETs using a simple spin‐coating method. The transparent and flexible nanocomposite FETs are capable of detecting an extremely small temperature change as small as 0.1 °C and are highly responsive to human body temperature. Temperature responsivity and optical transmittance of transparent nanocomposite FETs were adjustable and tuneable by changing the thickness and R‐GO concentration of the nanocomposite.     

The Ferroelectric Field Effect within an Integrated Core/Shell Nanowire

The synthesis of cylindrical silicon‐core and ferroelectric oxide perovskite‐shell nanowires and their response characteristics as individual three‐terminal nanoscale electronic devices is reported. The co‐axial nanowire geometry facilitates large ferroelectric field‐effect modulation (>10⁴) of nanowire conductivity following sequential application and removal of an applied dc field. Source‐drain current–voltage traces collected during sweeps of ferroelectric gate potential and switching of the component of shell outward and inward polarization provide direct evidence of ferroelectric coupling on nanowire channel conductance. Despite a very small (1:20) ferroelectric‐to‐semiconductor channel thickness ratio, an unexpectedly strong electrostatic coupling of ferroelectric polarization to channel conductance is observed because of the co‐axial gate geometry and curvature‐induced strain enhancement of ferroelectric polarization.     

Nano‐Imprinted Ferroelectric Polymer Nanodot Arrays for High Density Data Storage

Ferroelectric vinylidene fluoride‐trifluoroethylene copolymer [P(VDF‐TrFE)] free‐standing ultrahigh density (≈75 Gb inch^?2) nanodot arrays are successfully fabricated through a facile, high‐throughput, and cost‐effective nano‐imprinting method using disposable anodic aluminum oxide with orderly arranged nanometer‐scale pores as molds. The nanodots show a large‐area smooth surface morphology, and the piezoresponse in each nanodot is strong and uniform. The preferred orientation of the copolymer chains in the nanodot arrays is favorable for polarization switching of single nanodots. The ferroelectric polymer memory prototype can be operated by a few volts with high writing/erasing speed, which comply with the requirements of integrated circuit. This approach provides a way of directly writing nanometer electronic features in two dimensions by piezoresponse force microscopy probe based technology, which is attractive for high density data storage.     

Electrical Double‐Slope Nonideality in Organic Field‐Effect Transistors

The field effect transistor (FET) is arguably one of the most important circuit elements in modern electronics. Recently, a need has developed for flexible electronics in a variety of emerging applications. Examples include form‐fitting healthcare‐monitoring devices, flexible displays, and flexible radio frequency identification tags. Organic FETs (OFETs) are viable candidates for producing such flexible devices because they incorporate semiconducting π‐conjugated materials, including small molecules and conjugated polymers, which are intrinsically soft and mechanically compatible with flexible substrates. For OFETs to be industrially viable, however, they must achieve not only high charge carrier mobility, but also ideal and comprehensible electrical characteristics. Most recently, nonideal double‐slope characteristics in the transfer curves of OFETs (i.e., high slope at low gate voltage and low slope at high gate voltage), have stirred debate, which has led to different mechanistic rationales in the literature. This review focuses on the general observations, mechanistic understanding, and possible solutions associated with phenomena that result in FETs with double‐slope characteristics. By surveying and systematically summarizing in a single source relevant literature that deals with the issue of double slope, the experimental framework and theoretical basis for interpreting and avoiding this electrical nonideality in OFETs is provided.     

Non‐Volatile Polymer Electroluminescence Programmable with Ferroelectric Field‐Induced Charge Injection Gate

Electroluminescence (EL) of organic and polymeric fluorescent materials programmable in the luminance is extremely useful as a non‐volatile EL memory with the great potential in the variety of emerging information storage applications for imaging and motion sensors. In this work, a novel non‐volatile EL memory in which arbitrarily chosen EL states are programmed and erased repetitively with long EL retention is demonstrated. The memory is based on utilizing the built‐in electric field arising from the remnant polarization of a ferroelectric polymer which in turn controls the carrier injection of an EL device. A device with vertically stacked components of a transparent bottom electrode/a ferroelectric polymer/a hole injection layer/a light emitting layer/a top electrode successfully emits light upon alternating current (AC) operation. Interestingly, the device exhibits two distinctive non‐volatile EL intensities at constant reading AC voltage, depending upon the programmed direct current (DC) voltage on the ferroelectric layer. DC programmed and AC read EL memories are also realized with different EL colors of red, green and blue. Furthermore, more than four distinguishable EL states are precisely addressed upon the programmed voltage input each of which shows excellent EL retention and multiple cycle endurance of more than 10⁵ s and 10² cycles, respectively.     

Application of Pt/a-Si:H gate GaAs FETs to wide noise margin direct-coupled FET logic

The use of a Pt/a-Si:H gate on GaAs MESFET structures is shown to produce a rectifying gate with lower currents in forward bias, this being applicable to increasing noise margins in direct coupled FET logic schemes. FETs show good DC transconductance, low hysteresis in the current voltage (I/V) characteristics, and the absence of severe drift. This confirms that the approach is not hampered by slow surface states.<>