Single crystalline PtSi nanowires, PtSi/Si/PtSi nanowire heterostructures, and nanodevices

We report the formation of PtSi nanowires, PtSi/Si/PtSi nanowire heterostructures, and nanodevices from such heterostructures. Scanning electron microscopy studies show that silicon nanowires can be converted into PtSi nanowires through controlled reactions between lithographically defined platinum pads and silicon nanowires. High-resolution transmission electron microscopy studies show that PtSi/Si/PtSi heterostructure has an atomically sharp interface with epitaxial relationships of Si[110]//PtSi[010] and Si(111)//PtSi(101). Electrical measurements show that the pure PtSi nanowires have low resistivities approximately 28.6 microOmega.cm and high breakdown current densities>1x10(8) A/cm2. Furthermore, using single crystal PtSi/Si/PtSi nanowire heterostructures with atomically sharp interfaces, we have fabricated high-performance nanoscale field-effect transistors from intrinsic silicon nanowires, in which the source and drain contacts are defined by the metallic PtSi nanowire regions, and the gate length is defined by the Si nanowire region. Electrical measurements show nearly perfect p-channel enhancement mode transistor behavior with a normalized transconductance of 0.3 mS/microm, field-effect hole mobility of 168 cm2/V.s, and on/off ratio>10(7), demonstrating the best performing device from intrinsic silicon nanowires.     

Growth of nickel silicides in Si and Si/SiOx core/shell nanowires

We exploited the oxide shell structure to explore the structure confinement effect on the nickel silicide growth in one-dimensional nanowire template. The oxide confinement structure is similar to the contact structure (via hole) in the thin film system or nanodevices passivated by oxide or nitride film. Silicon nanowires in direct contact with nickel pads transform into two phases of nickel silicides, Ni31Si12 and NiSi2, after one-step annealing at 550 °C. In a bare Si nanowire during the annealing process, NiSi2 grows initially through the nanowire, followed by the transformation of NiSi2 into the nickel-rich phase, Ni31Si12 starting from near the nickel pad. Ni31Si12 is also observed under the nickel pads. Although the same phase transformations of Si to nickel silicides are observed in nanowires with oxide confinement structure, the growth rate of nickel silicides, Ni31Si12 and NiSi2, is retarded dramatically. With increasing oxide thickness from 5 to 50 nm, the retarding effect of the Ni31Si12 growth and the annihilation of Ni2Si into the oxide confined-Si is clearly observed. Ni31Si12 and Ni2Si phases are limited to grow into the Si/SiOx core-shell nanowire as the shell thickness reaches 50 nm. It is experimental evidence that phase transformation is influenced by the stressed structure at nanoscale.     

Silicidation of silicon nanowires by platinum

The solid-state reaction between platinum and silicon nanowires grown by the vapor-liquid-solid technique was studied. The reaction product PtSi is an attractive candidate for contacts to p-type silicon nanowires due to the low barrier height of PtSi contacts to p-type Si in the planar geometry, and the formation of PtSi was the motivation for our study. Silicidation was carried out by annealing Pt on Si nanowires from 250 to 700 degrees C, and the reaction products were characterized by transmission electron microscopy. Strikingly different morphologies of the reacted nanowires were observed depending on the annealing temperature, platinum film thickness, silicon nanowire diameter, and level of unintentional oxygen contamination in the annealing furnace. Conversion to PtSi was successfully realized by annealing above 400 degrees C in purified N2 gas. A uniform morphology was achieved for nanowires with an appropriate combination of Si nanowire diameter and Pt film thickness to form PtSi without excess Pt or Si. Similar to the planar silicidation process, oxygen affects the nanowire silicidation process greatly.     

Growth of GaInAs/AlInAs heterostructure nanowires for long-wavelength photon emission

We investigated the growth of GaInAs/AlInAs heterostructure nanowires on InP(111)B and Si(111) substrates in a metalorganic vapor phase epitaxy reactor. Au colloids were used to deposit Au catalysts 20 and 40 nm in diameter on the substrate surfaces. We obtained vertical GaInAs and AlInAs nanowires on InP(111)B surfaces. The GaInAs nanowires capped with GaAs/AlInAs layers show room-temperature photoluminescence. The peak exhibits a blue-shift when the Ga content in the core GaInAs nanowire is increased. For the GaInAs/AlInAs heterostructure growth, it is possible to change the Ga content sharply but Al also exists in the GaInAs layer regions. We also found that the ratios of Ga and Al contents to In content tend to increase and the axial growth rate to decrease along the nanowire toward the top. We were also able to make vertical GaInAs nanowires on Si(111) surfaces after a short growth of GaP and InP.     

In-situ TEM observation of repeating events of nucleation in epitaxial growth of nano CoSi2 in nanowires of Si

The formation of CoSi and CoSi2 in Si nanowires at 700 and 800 degrees C, respectively, by point contact reactions between nanodots of Co and nanowires of Si have been investigated in situ in a ultrahigh vacuum high-resolution transmission electron microscope. The CoSi2 has undergone an axial epitaxial growth in the Si nanowire and a stepwise growth mode was found. We observed that the stepwise growth occurs repeatedly in the form of an atomic step sweeping across the CoSi2/Si interface. It appears that the growth of a new step or a new silicide layer requires an independent event of nucleation. We are able to resolve the nucleation stage and the growth stage of each layer of the epitaxial growth in video images. In the nucleation stage, the incubation period is measured, which is much longer than the period needed to grow the layer across the silicide/Si interface. So the epitaxial growth consists of a repeating nucleation and a rapid stepwise growth across the epitaxial interface. This is a general behavior of epitaxial growth in nanowires. The axial heterostructure of CoSi2/Si/CoSi2 with sharp epitaxial interfaces has been obtained. A discussion of the kinetics of supply limited and source-limited reaction in nanowire case by point contact reaction is given. The heterostructures are promising as high performance transistors based on intrinsic Si nanowires.     

Growth of GaAs Nanowires on Si Substrates Using a Molecular Beam Epitaxy

Au-catalyzed GaAs nanowires were grown on Si substrates by vapor-liquid-solid growth method using a molecular beam epitaxy (MBE). The MBE growth could produce controlled crystalline orientation and uniform diameter along the wire axis of the GaAs nanowires by adjusting growth conditions including growth temperature and V/III flux ratio. Growths of GaAslang001rang as well as GaAslang111rang nanowires were observed by transmission electron microscopy and scanning electron microscopy. Epitaxially grown GaAslang111rang nanowires on a Si(111) substrate were verified through x-ray diffraction out-of-plane 2thetas/omega-scans. A strong room-temperature photoluminescence (PL) was observed from the epitaxially grown GaAslang111rang nanowires on a Si(100) substrate. Results of low-temperature (10 K) PL measurements and current-sensing atomic force microscopy indicated that the GaAs nanowires on a Si substrate were unintentionally doped with Si     

Diameter dependent growth rate and interfacial abruptness in vapor-liquid-solid Si/Si1-xGex heterostructure nanowires

A strong diameter dependence is observed in the interfacial abruptness and growth rates in Si/Si 1- x Ge x axial heterostructure nanowires grown via Au-mediated low pressure CVD using silane and germane precursors. The growth of these nanowires has similarities to that of heterostructure thin films with similar compositional interfacial broadening, which increases with and is on the order with diameter. This broadening may reveal a fundamental challenge to fabrication of abrupt heterostructures via VLS growth.     

Some aspects of substrate pretreatment for epitaxial Si nanowire growth

We report on the influence of the surface pretreatment for vapor-liquid-solid growth of epitaxial silicon nanowires with gold catalyst and silane precursor on Si(111) substrates. In this paper we make it obvious that a thin native oxide layer on the Si substrate-as is present under most technological conditions-or a thin layer of oxide formed on top of the catalytic gold particle restrain nucleation and nanowire growth. High resolution transmission electron microscopy, and electron energy loss spectroscopy were utilized to demonstrate Si diffusion from the substrate through the catalytic Au layer and further the formation of a thin oxide layer atop. Based on this observation we present a sample pretreatment practice, making the catalyst insensitive for further oxide formation, thereby preserving epitaxy for nanowire synthesis.     

Selective area growth of GaN nanowires using metalorganic chemical vapor deposition on nano-patterned Si(111) formed by the etching of nano-sized Au droplets

We report on the selective area growth of GaN nanowires (NWs) on nano-patterned Si(111) substrates by metalorganic chemical vapor deposition. The nano-patterns were fabricated by the oxidation of Si followed by the etching process of Au nano-droplets. The size of formed nano-pattern on Si(111) substrate was corresponding to the size of Au nano-droplet, and the diameter of GaN NWs grown was similar to the diameter of fabricated nano-pattern. The interesting phenomenon of using the nano-patterned Si(111) substrates is the formation of very clear substrate surface even after the growth of GaN NWs. However, in the case of GaN NWs grown using Au nano-droplets, there was several nanoparticles including GaN bulk grains on the Si(111) substrates. The smooth surface morphology of nano-patterned Si(111) substrates was attributed to the presence of SiO₂ layer which prevents the formation of unnecessary GaN particles during the GaN NW growth. Therefore, we believe that nano-patterning method of Si(111) which was obtained by the oxidation of Si(111) substrate and subsequent Au etching process can be utilized to grow high-quality GaN NWs and its related nano-device applications.     

Transport modulation in Ge/Si core/shell nanowires through controlled synthesis of doped Si shells

Appropriately controlling the properties of the Si shell in Ge/Si core/shell nanowires permits not only passivation of the Ge surface states, but also introduces new interface phenomena, thereby enabling novel nanoelectronics concepts. Here, we report a rational synthesis of Ge/Si core/shell nanowires with doped Si shells. We demonstrate that the morphology and thickness of Si shells can be controlled for different dopant types by tuning the growth parameters during synthesis. We also present distinctly different electrical characteristics that arise from nanowire field-effect transistors fabricated using the synthesized Ge/Si core/shell nanowires with different shell morphologies. Furthermore, a clear transition in the modification of device characteristics is observed for crystalline shell nanowires following removal of the shell using a unique trimming process of successive native oxide formation/etching. Our results demonstrate that the preferred transport path through the nanowire structure can be modulated by appropriately tuning the growth conditions.     

Investigation of indium oxide as a self-catalyst in ZnO/ZnInO heterostructure nanowires growth

We investigated the self-catalytic role of indium oxide in the growth process of ZnO/ZnInO heterostructure nanowires on Si(111). The prepared nanowires had hexagonal cross sections and were tapered with tip diameters of 90 ± 5 nm and base diameters of 230 ± 5 nm. Energy dispersive X-ray and field emission Auger spectroscopies indicated that the grown nanowires were heterostructures of ZnO and ZnInO. Analysis of the early growth process revealed that indium may play a self-catalytic role. Therefore, the vapor-liquid-solid mechanism is likely to be responsible for growth of ZnO/ZnInO nanowires. X-ray diffraction and room temperature photoluminescence (PL) data demonstrated that the presence of indium results in a decrease in nanowires' crystallinity. These wires produced a large PL emission peak in the ultraviolet (UV) region and a smaller peak in the green region of the electromagnetic spectrum. The UV peak of the ZnO/ZnInO nanowires is blue-shifted with respect to that of pure ZnO nanowires.     

Bidirectional growth of indium phosphide nanowires

We present a bidirectional growth mode of InP nanowires grown by selective-area metalorganic vapor-phase epitaxy (SA-MOVPE). We studied the effect of the supply ratio of DEZn ([DEZn]) on InP grown structure morphology and crystal structures during the SA-MOVPE. Two growth regimes were observed in the investigated range of the [DEZn] on an InP(111)B substrate. At low [DEZn], grown structures formed tripod structures featuring three nanowires branched toward the [111]A directions. At high [DEZn], we obtained hexagonal pillar-type structures vertically grown on the (111)B substrate. These results show that the growth direction changes from [111]A to [111]B as [DEZn] is increased. We propose a growth mechanism based on the correlation between the incident facet of rotational twins and the shapes of the grown structures. Our results bring us one step closer to controlling the direction of nanowires on a Si substrate that has a nonpolar nature. They can also be applied to the development of InP nanowire devices.     

Growth, defect formation, and morphology control of germanium-silicon semiconductor nanowire heterostructures

By the virtue of the nature of the vapor-liquid-solid (VLS) growth process in semiconductor nanowires (NWs) and their small size, the nucleation, propagation, and termination of stacking defects in NWs are dramatically different from that in thin films. We demonstrate germanium-silicon axial NW heterostructure growth by the VLS method with 100% composition modulation and use these structures as a platform to understand how defects in stacking sequence force the ledge nucleation site to be moved along or pinned at a single point on the triple-phase circumference, which in turn determines the NW morphology. Combining structural analysis and atomistic simulation of the nucleation and propagation of stacking defects, we explain these observations based on preferred nucleation sites during NW growth. The stacking defects are found to provide a fingerprint of the layer-by-layer growth process and reveal how the 19.5° kinking in semiconductor NWs observed at high Si growth rates results from a stacking-induced twin boundary formation at the NW edge. This study provides basic foundations for an atomic level understanding of crystalline and defective ledge nucleation and propagation during [111] oriented NW growth and improves understanding for control of fault nucleation and kinking in NWs.     

Influence of substrates on the formation of the TiSi nanowire by atmosphere pressure chemical vapor deposition

TiSi nanowires were deposited on both Si(111) and glass substrates by using SiH4, TiCl4 and N2 as the Si, Ti precursors and diluted gas respectively through atmosphere pressure chemical vapor deposition (APCVD) method. Effects of the substrates on formation of the nanowires were investigated. The results show that the nanowires can be formed on both Si(111) and glass substrates at ratio of SiH4/TiCl4 of 4. However, the quantities of the TiSi nanowires that formed with glass substrate are less than that with Si(111) substrate. The nanowires formed with glass substrate has length of 2-3 microm and diameters of 15-25 nm while that is 4-5 microm and 25-35 nm respectively with Si(111) substrate. Great quantities of the titanium silicide nanowires with relative higher contents of the C54 TiSi2 crystalline phase underneath can be obtained through improving the deposition conditions.     

Dynamics of dysprosium silicide nanostructures on Si(001) and (111) surfaces

The growth and coarsening dynamics of dysprosium silicide nanostructures are observed in real-time using photoelectron emission microscopy. The annealing of a thin Dy film to temperatures in the range of 700–1050 °C results in the formation of epitaxial rectangular silicide islands and nanowires on Si(001) and triangular and hexagonal silicide islands on Si(111). During continuous annealing, individual islands are observed to coarsen via Ostwald ripening at different rates as a consequence of local variations in the size and relative location of the surrounding islands on the surface. A subsequent deposition of Dy onto the Si(001) surface at 1050 °C leads to the growth of the preexisting islands and to the formation of silicide nanowires at temperatures above where nanowire growth typically occurs. Immediately after the deposition is terminated, the nanowires begin to decay from the ends, apparently transferring atoms to the more stable rectangular islands. On Si(111), a low continuous flux of Dy at 1050 °C leads to the growth of kinked and jagged island structures, which ultimately form into nearly equilateral triangular shapes.     

Observation of hole accumulation in Ge/Si core/shell nanowires using off-axis electron holography

Hole accumulation in Ge/Si core/shell nanowires (NWs) has been observed and quantified using off-axis electron holography and other electron microscopy techniques. The epitaxial [110]-oriented Ge/Si core/shell NWs were grown on Si (111) substrates by chemical vapor deposition through the vapor-liquid-solid growth mechanism. High-angle annular-dark-field scanning transmission electron microscopy images and off-axis electron holograms were obtained from specific NWs. The excess phase shifts measured by electron holography across the NWs indicated the presence of holes inside the Ge cores. Calculations based on a simplified coaxial cylindrical model gave hole densities of (0.4 ± 0.2) /nm(3) in the core regions.     

Vertically oriented germanium nanowires grown from gold colloids on silicon substrates and subsequent gold removal

A linker-free method to deposit citrate-stabilized Au colloids onto hydrogen-terminated Si by acidifying the Au colloid solution with HF or HCl is presented. This method prevents oxide formation and provides a model system for studying orientation control of nanowires by epitaxy. Conditions are reported that result in vertically oriented Ge nanowires of uniform diameter and length on Si(111). We then present a method to remove Au catalysts from the nanowires with aqueous triiodide and HCl.     

Selective-area catalyst-free MBE growth of GaN nanowires using a patterned oxide layer

GaN nanowires (NWs) were grown selectively in holes of a patterned silicon oxide mask, by rf-plasma-assisted molecular beam epitaxy (PAMBE), without any metal catalyst. The oxide was deposited on a thin AlN buffer layer previously grown on a Si(111) substrate. Regular arrays of holes in the oxide layer were obtained using standard e-beam lithography. The selectivity of growth has been studied varying the substrate temperature, gallium beam equivalent pressure and patterning layout. Adjusting the growth parameters, GaN NWs can be selectively grown in the holes of the patterned oxide with complete suppression of the parasitic growth in between the holes. The occupation probability of a hole with a single or multiple NWs depends strongly on its diameter. The selectively grown GaN NWs have one common crystallographic orientation with respect to the Si(111) substrate via the AlN buffer layer, as proven by x-ray diffraction (XRD) measurements. Based on the experimental data, we present a schematic model of the GaN NW formation in which a GaN pedestal is initially grown in the hole.     

CVD金刚石的晶体形态及界面位向关系

综述了CVD金刚石的晶体形态及界面位向关系.用SEM观察CVD金刚石晶粒形态主要有立方体、长方体、八面体、立方八面体、孪晶八面体、十面体和二十面体颗粒以及球形金刚石,讨论了晶粒的形成条件.用TEM观察则主要有单晶体、孪晶八面体和五重孪晶体形态.界面位向关系主要有:Si(001)//Diamond(001),Si<110>//Diamond<110(50078018);Si(111)//Diamond(111),Si<110>//Diamond<110>和Si(110)//Diamond(110),Si[110]//Diamond[111].     

脉冲激光制备硅基超薄PtSi薄膜

用脉冲激光沉制备了纳米级Pt/Si异质层,对激光退火形成超薄PtSi薄膜进行了研究,对于Pt、Si互扩散反应形成Pt2Si和PtSi的过程利用XPS进行了测试分析,通过XPS和AFM等分析测试手段对不同参数激光退火形成的PtSi薄膜的结构特性进行观测。我们获得了均匀的、超薄边疆的PtSi层且具有平滑的PtSi/Si界面。