基于光电混合集成的四通道外调电/光转换组件

由于单片级集成技术面临开发成本高、周期长等问题,提出一种基于光电混合集成封装的四通道外调电/光转换组件.该组件利用光电混合集成技术,采用空间光学透镜耦合代替原有光纤互连方式、传输微带代替传统电缆互连方式、金丝/金带代替传统低频导线方式以及微组装工艺实现多专业裸芯片一体化气密封装代替分离组件混合装配方式,从而达到大幅度压...     

SMT-compatible large-tolerance "OptoBump" interface for interchip optical interconnections

A new optical interface called OptoBump has been developed to couple optoelectronic packages to an optoelectronic printed circuit board, thus enabling economical chip-to-chip optical interconnections. The optoelectronic packages have vertical-cavity surface-emitting laser (VCSEL) and PD-array chips in their cavity and an large scale integrated (LSI) mounted on top. A package converts high-speed electrical signals from the LSI into an array of optical signals, which are emitted from the bottom. The PCB contains integrated polymer optical waveguides to optically connect packages, and the use of surface-mount technology (SMT) to mount packages on the printed circuit board (PCB) keeps assembly costs low. The key to making the OptoBump interface fully compatible with SMT is the integration of microlens arrays directly into both packages and the PCB. A wide, collimated optical beam couples a package to the board across a narrow air gap and provides a large tolerance to misalignment during the SMT process. This paper explains the concept of the OptoBump interface, the optical coupling design by ray-trace simulation, and the fabrication of polymer microlenses and polymer waveguides. Experimental results revealed that the OptoBump interface provides a large tolerance of /spl plusmn/50 /spl mu/m, which is large enough for use with SMT. The OptoBump interface can replace high-speed electrical wiring at the chip level and also offers the benefit of not having any optical fibers or connectors on the board. Thus, it has the potential to bring about a revolutionary change in optoelectronic packaging.     

Integrated optoelectronic materials and circuits for optical interconnects

Conventional interconnect and switching technology is rapidly becoming a critical issue in the realization of systems using high speed silicon and GaAs based technologies. In recent years clock speeds and on-chip density for VLSI/VHSIC technology has made packaging these high speed chips extremely difficult. A strong case can be made for using optical interconnects for on-chip/on-wafer, chip-to-chip and board-to-board high speed communications. GaAs Integrated Optoelectronic Circuits (IOC's) are being developed in a number of laboratories for performing Input/Output functions at all levels. In this paper integrated optoelectronic materials, electronics and optoelectronic devices are presented. IOC’s are examined from the standpoint of what it takes to fabricate the devices and what performance can be expected.     

Optoelectronic integrated four-channel transmitter arrayincorporating AlGaAs/GaAs quantum-well lasers

A four-channel optoelectronic integrated transmitter array which is fabricated on a single GaAs substrate and operates at 834 nm is described. Each of the circuits incorporates a laser, a photodiode for laser power monitoring, and a laser driver circuit consisting of three GaAs field-effect transistors and a resistor. Laser threshold current of 15-21 mA, transmitter conversion efficiency of approximately 6 mW/V and high-speed operation at a bit rate of more than 1.5-Gb/s NRZ with allowable crosstalk have been demonstrated. A preliminary aging test of the lasers indicated that their stability is comparable to that of discrete devices. The results have demonstrated the feasibility of applying the transmitter array to optical components that process multichannel optical signals at high speed     

基于硅基堆叠SIP技术的超宽带T/R组件

传统的超宽带T/R组件采用的是两维砖块式结构,体积和重量已不适应目前小型化、低剖面、易共形的相控阵天线要求。文中提出的基于硅基堆叠系统级封装(SIP)技术,将四通道的射频芯片高度集成在硅基介质基板上,将多层介质基板厚金压合,实现多层堆叠的三维封装。通过采用芯片多功能集成技术和超宽带射频信号的垂直互连技术,设计出三维堆叠的四通道超宽带T/R组件。T/R组件带宽为6 GHz～18 GHz,单通道的发射功率优于23 dBm,接收增益优于20 dB,可实现6位数控衰减及6位数控移相,尺寸仅有13.0 mm×13.0 mm×3.4 mm。该技术可以实现多通道超宽带T/R组件的SIP封装,有利于工程应用。     

Optoelectronic Package Having Low-Loss Optical Waveguide Hole With Core–Clad Structure for Chip-to-Chip Interconnection

We have developed optoelectronic packages having optical waveguide holes with core–clad structures for chip-to-chip optical interconnection within computer systems. A rate of 10-Gb/s/ch chip-to-chip optical signal transmission has been demonstrated. The optoelectronic package we have developed consists of two guide pins and four-channel optical waveguide holes. The two guide pins are used to align an optical fiber connector with an optical device. The optical waveguide holes are used to transmit optical signals vertically through the optoelectronic package. Using the optical waveguide holes in the optoelectronic package, and high-quality signal transmission has been achieved.      

Integrated optical interconnections

The use of optical interconnections between processors, boards, chips, and gates in electronic digital systems to overcome the current performance limitations is described. The advantages of optical interconnections in relation to the interconnection distance, the data capacity, and the interconnection functions are presented. The devices which will support practical implementation of optical interconnections and the integration of optical interconnection devices are discussed. The development of future integrated optoelectronic materials, processing, and fabrication technologies to support integrated optical electronics is also discussed     

Multichip Integration on a PLC Platform for 16 × 16 Optical Switch Module Using Passive Alignment Technique

We have integrated eight sets of four-channel semiconductor optical amplifier (SOA) array chips on a silica-based planar lightwave circuit (PLC) platform for 16 times 16 optical switch module by flip-chip bonding technique. To accurately bond eight sets of the arrayed SOA chips on a PLC platform, two methods of two-step assembly and one-step assembly were tried. Among the results of two assembly methods, one-step assembly was estimated to be desirable in respect of the horizontal and vertical bonding accuracy. The bonding accuracy was measured to be within 0.5 mum. Also, we demonstrated 16 times 16 optical switch module.     

The application of lead-free solder to optical fiber packaging

To achieve precise, hermetic, and reliable optoelectronic packaging, we studied a novel technology for bonding fibers to v-grooved chips by metallic soldering. Multilayered metallization of Ti/Au, Ti/Cu/Au, or Ti/Ni/Au has been prepared to improve the poor bonding nature of solder on oxide surface. The eutectic 43Sn57Bi (wt.%) alloy, having a melting point of 139°C, was selected to bond the fibers to v-grooved chips. The alignment and adhesion tests result show that the precision packaging by soldering has a satisfied reliability in the range of working temperature from −40°C to 85°C. The metallic solder bonding is hermetic, and hence, it can isolate the optical device from ambient environment.     

基于单芯片技术和垂直腔面发射激光器的光纤与光电器件被动无源对准光互连

在平行光互接应用的光收发器中,光纤对准占据了光电封装成本的一大部分。文章研究的光发送器和接收器由工作波长950nm的垂直腔面发射激光器（VCSELs）和谐振腔增强型（RCE）光检测器组成,并键合到单个双极型互补金属氧化物半导体（BiCMOS）芯片上。考虑到性能与生产成本,对不同的组装结构进行了研究。最终选择了利用倒装技术将光芯片键合到集成电路（IC）的方法。为实现光纤的被动无源对准,提出了在一片倒装焊了光芯片的IC上方叠放的硅片上蚀刻孔的设想。目前这样一种测试装置已由法国LETI开发出来,并通过它证明了采用这种方法能够获得高精度（μm）的光纤对准。     

光神经网络中的半导体光电器件

叙述了光神经网络的基本概念，并介绍了光神经网络中使用中的半导体光电器件， 体可调制光电检测器（ＶＳＰＤ），具有内存贮光神经芯片，人工视网膜芯片，以及不对称的Ｆａｂｒｙ－Ｐｅｒｏｔ调制器（ＡＦＰＭ）的最新研究结果。     

Low-stress hybridisation of emitters,detectors and driver circuitry on a silicon motherboard for optoelectronic interconnect architecture

In the absence of a truly integrated silicon optoelectronics technology, manufacturable hybridisation technologies for III–V optoelectronic components, compatible with silicon and CMOS substrates, are essential for optoelectronic interconnect. The hybridisation technology for a clock distribution optical interconnect architecture is reported. A substrate removal technology for an 8×8 array of 10 μm thick VCSEL coupons is described, and the performance of AlAs and AlGaAs etch stop layers is discussed. Optoelectronic systems which depend on the retention of the polarisation specific nature of components restrict the mechanical constraints on their manipulation and bonding, to avoid stresses which could destroy the polarisation specificity of the component. A low-stress pick and place technology using a mask aligner has been employed. Eight hundred and fifty nanometres top-surface emitting GaAs/AlGaAs VCSELs, InGaAs/InP p–i–n photodiode arrays, and high-frequency CMOS silicon driver chips have been hybridised on silicon motherboards using this technology. The factors influencing the choice of bonding materials and the sequence of component hybridisation, including the requirements of subsequent planarisation and wiring processes, are discussed. The sources of alignment error are reported. Examples of working emitters, detectors and driver circuitry hybridised using this technology are presented.     

4×25Gb/s光电收发一体模块封装的设计与实现

光电收发模块的性能对整个通信系统质量至关重要.设计一个包括光电器件、封装结构等参数的光电协同链路仿真系统,首先从系统封装方案、版图和信号完整性等方面进行设计优化,获得封装结构的电学参数;其次,对光电器件参数进行优化提取,并建立一个包括封装结构电学参数对系统的性能影响的光电协同的仿真链路,通过光电协同链路仿真提前对模块进...     

Optoelectronic/VLSI

Technology is presented for placing thousands of surface-normal input and output optoelectronic devices onto very large scale integration (VLSI) chips. This enables optical means of bringing information onto and off of an integrated circuit (IC), supplanting electrical means such as wire-bonds     

纳米光波导光滑技术研究进展

随着半导体工业的发展,集成光电器件的特征尺寸越来越小,纳米光波导表面光滑技术将面临新的挑战。降低纳米光波导表面粗糙度,制造超低损耗纳米光波导,实现其高效片间光互连与片内光耦合,是集成光电子器件,特别是高灵敏微陀螺、生化传感器、光通讯等器件发展的关键。主要分析了光波导表面粗糙度与传播损耗的关系,着重阐述纳米光波导表面光滑工艺方法,包括热氧化法、氢退火法及激光束法的研究现状及最新进展,总结了各类工艺的技术难点与发展前景,并展望其在微机电、光集成方面应用前景。     

Optically interconnected electronic chips: a tutorial and review ofthe technology

Optoelectronic interconnects between VLSI chips have been identified by the Semiconductor Industry Association (SIA) Roadmap as one of the few solutions to overcoming the communication bandwidth bottleneck between VLSI chips. Large-scale demonstrators based on optical interconnects, when fully operational, can exhibit today the same aggregate bandwidth as that foreseen by the Roadmap for the year 2007. Massive parallelism, low input/output driving energy over large distances, and synchronous processing of hundreds of optical information input channels mean that these prototypes can potentially provide on/off communication rates in the tera-pin-Hz region (i.e., a total capacity of one terabit/s). After discussing the limitations of electrical interconnects this paper reviews the means of integrating optoelectronic components with VLSI chips, suitable types of optoelectronic device and the three main approaches to constructing optical data links: fibre-ribbons, planar waveguides and free-space optics     

甚短距离光互连模块技术的发展动态

甚短距离光互连技术作为一种突破铜线互连传输瓶颈有效方法,受到了广泛关注。半导体光学器件技术、高速化集成电路技术和光电模块封装技术作为实现光互连的关键技术发展较为迅速。首先阐述了垂直腔面发射激光器的电路模型,然后针对光信号发送模块介绍了预加重补偿技术以及开环方式稳定光功率输出技术,并对如何提高光信号接收模块带宽性能的电路技术进行了分析。其次结合光互连模块技术标准的发展,以NEC公司的实用化甚短距离并行光互连模块为例,对其光电封装技术进行了说明,最后就甚短距离光互连技术所面临的课题及发展前景进行了总结。     

采用单级CMOS-SEED集成芯片的ATM光交换模块

提出了一种ATM光交换模块的系统结构.这种ATM交换模块采用了单级CMOS-SEED混合集成电路芯片及少量的光学元件,具有吞吐量大、稳定性高、封装调试容易等特点.对模块所采用的光电子混合集成芯片及系统的光学结构进行了描述.     

Glass waveguides on silicon for hybrid optical packaging

Work on deposited glass waveguides on silicon to form waveguides and filters is reviewed. The choice of these particular waveguides makes sense only as part of a consistent approach to optoelectronic packaging. Hybrid optical packaging on silicon (HOPS) is described and briefly compared with other techniques. For these packages, two waveguides were developed: a tight mode waveguide with a silicon nitride rib core for matching a semiconductor laser and a loose mode waveguide with a phosphosilicate glass core for matching an optical fiber