一款调制器和过采样率可配置的单芯片1.2V 95-55dB动态范围的Delta-Sigma模数转换器设计

A single die 1.2 V multi-stage noise shaping（Mash） 2-2 delta sigma analog to digital converter（ADC）for wide applications is implemented. The configurable Mash 2-2 modulator with a new decimation filter design is presented to achieve wide and high dynamic range（DR） for multiple practical applications. The novel modulator can be configured as a Mash 2-2 modulator for high precision or a 2-order modulator for low DR. The decimation filter is designed to select the OSR flexibly among cascaded integrator comb（CIC） filter and two half-band filters（HBF）. The serial peripheral interface（SPI） can be used to adjust the sampling frequency and the oversampling ratio（OSR）. The design was fabricated in a 0.13 m CMOS process with an area of 0.91 mm2and a total power of 5.2 mW. The measurement results show that the dynamic range（DR） of the proposed ADC can change from 55to 95 dB with the configurable OSR from 16 to 256. The spurious free dynamic range（SFDR） and signal-to-noise distortion ratio（SNDR） can get 99 dB and 86.5 dB, respectively.     

Continuous time sigma delta ADC design and non-idealities analysis

A wide bandwidth continuous time sigma delta ADC is implemented in 130 nm CMOS.A detailed non-idealities analysis(excess loop delay,clock jitter,finite gain and GBW,comparator offset and DAC mismatch) is performed developed in Matlab/Simulink.This design is targeted for wide bandwidth applications such as video or wireless base-stations.A third-order continuous time sigma delta modulator comprises a third-order RC operational-amplifier -based loop filter and 3-bit internal quantizer operated at 512 MHz clock frequency.The sigma delta ADC achieves 60 dB SNR and 59.3 dB SNDR over a 16-MHz signal band at an OSR of 16.The power consumption of the CT sigma delta modulator is 22 mW from the 1.2-V supply.     

An A/D interface based on ∑△ modulator for thermal vacuum sensor ASICs

A newΣΔmodulator architecture for thermal vacuum sensor ASICs is proposed.The micro-hotplate thermal vacuum sensor fabricated by surface-micrornachining technology can detect the gas pressure from 1 to 10~5 Pa. The amplified differential output voltage signal of the sensor feeds to theΣΔmodulator to be converted into digital domain.The presentedΣΔmodulator makes use of a feed-forward path to suppress the harmonic distortions and attain high linearity.Compared with other feed-forward architectures present...     

A 1-V 60-μW 85-dB dynamic range continuous-time third-order sigma-delta modulator

A 1-V third order one-bit continuous-time（CT） EA modulator is presented. Designed in the SMIC mixedsignal 0.13-μm CMOS process, the modulator utilizes active RC integrators to implement the loop filter. An efficient circuit design methodology for the CT ZA modulator is proposed and verified. Low power dissipation is achieved through the use of two-stage class A/AB amplifiers. The presented modulator achieves 81.4-dB SNDR and 85-dB dynamic range in a 20-kHz bandwidth with an over sampling ratio of 128. The total power consumption of the modulator is only 60 μW from a 1-V power supply and the prototype occupies an active area of 0.12 mm^2.     

Efficient Design of Low Delay Nonuniform Cosine Modulated Filter Banks Based on Gradient Information

An efflcient approach to the design of low delay nonuniform filter bank is presented which is derived from a uniform cosine modulated filter bank. In this derived nonuniform filter bank, the analysis and synthesis filters are combinations of the cosine modulated versions of a prototype filter. The design problem is formulated as a quadratic unconstrained least squares minimization prob- lem, in which the gradient vector of the objective function with respective to unknown parameters can be obtained analytically. A design example and comparisons are in- cluded which show that the proposed design method leads to filter banks with improved performance.     

Multi-tap microwave photonic filter with positive and negative coefficients based on an unbalanced Mach-Zehnder modulator

A novel approach for the implementation of microwave photonic filter with positive and negative coefficients based on an unbalanced Mach-Zehnder modulator(MZM) is proposed.In the proposed filter,a microwave signal to be filtered is applied to an unbalanced MZM.Thanks to the unbalance between the two arms of the modulator,a π phase shift is obtained by adjusting the wavelength interval between the adjacent wavelengths,which leads to the generation of the positive and negative coefficients.The theoretical fundamentals of the design are described,which show that the required unbalanced MZM in the scheme can be well fabricated by the current technology,and the required other components,including the wavelength multiplexer,are also commercially available devices.An eight-tap microwave photonic filter with positive and negative coefficients is demonstrated.The tunability and reconfigurability of the eight-tap microwave photonic filter are also investigated to verify our approach.     

一种基于开关型运放和双向循环移位DWA的0.9V Delta-Sigma模数转换器

This paper presents a low-power high-precision switched-opamp(SO)-based delta-sigma(△Σ) analog-to -digital converter(ADC).The proposed SO design allows circuit operation at sub-1 V supply voltage,only needs to work in half of a clock cycle,and thus is suitable for low power applications.In addition,an opamp-sharing technique is applied to save on hardware overheads.Due to the use of a dual cycle shift data weighted averaging (DCS-DWA) technique,mismatch errors caused in the feedback DAC have been eliminated without introducing signal-dependent tones.The proposed ADC has been implemented in a standard 0.18μm process and measured to have a 92.2 dB peak SNDR and 94.1 dB dynamic range with 25 kHz signal bandwidth.The power consumption is 58μW for the modulator at 0.9 V supply voltage and 96μW for the decimation filter,which translate to the figure-of-merit(FOM) of 35.4 fJ/step for the solo modulator,and 94 fJ/step for the whole system.     

一款应用于生物传感器的1.2V-600nW 12bit 2kS/s的增量型模数转换器

This paper presents an ultra-low power incremental ADC for biosensor interface circuits.The ADC consists of a resettable second-order delta–sigma(°/ modulator core and a resettable decimation filter.Several techniques are adopted to minimize its power consumption.A feedforward path is introduced to the modulator core to relax the signal swing and linearity requirement of the integrators.A correlated-double-sampling(CDS)technique is applied to reject the offset and 1/f noise,thereby removing the integrator leakage and relaxing the gain requirement of the OTA.A simple double-tailed inverter-based fully differential OTA using a thick-oxide CMOS is proposed to operate in the subthreshold region to fulfill both an ultra-low power and a large output swing at 1.2 V supply.The signal addition before the comparator in the feedforward architecture is performed in the current domain instead of the voltage domain to minimize the capacitive load to the integrators.The capacitors used in this design are of customized metal–oxide–metal(MOM) type to reach the minimum capacitance set by the k T =C noise limit.Fabricated with a 1P6 M 0.18 m CMOS technology,the presented incremental ADC consumes600 n W at 2 k S/s from a 1.2 V supply,and achieves 68.3 d B signal to noise and distortion ratio(SNDR) at the Nyquist frequency and an FOM of 0.14 p J/conversion step.The core area is 100120 m2.     

Design and noise analysis of a sigma-delta capacitive micromachined accelerometer

A single-loop fourth-order sigma-delta(ΣΔ) interface circuit for a closed-loop micromachined accelerometer is presented.Two additional electronic integrators are cascaded with the micromachined sensing element to form a fourth-order loop filter.The three main noise sources affecting the overall system resolution of aΣΔaccelerometer, mechanical noise,electronic noise and quantization noise,are analyzed in detail.Accurate mathematical formulas for electronic and quantization noise are established.The ASIC ...     

Design and implementation of a low-pass filter for microsensor signal processing

A novel low-pass filter that consists of a switched capacitor filter(SCF) and its antialiasing prefilter and smoothing postfilter is proposed for a microsensor signal processing system,which is used in separation point detection on the surface of micro air vehicles.In the system,the filter is not only applied to finish the function of filtering but also used as the front end antialiasing filter of the over sampling analog-to-digital converter.This proposed implementation mostly relies on the design of a ...     

温度不敏感电光调制器和保偏光衰减器设计

A new design for temperature insensitive electro-optic modulator and variable optical attenuator is presented in this paper. The modulator consists of a pair of electro-optic crystals, one polarizer and a pair of collimators. The propagation of light through the modulator is studied in detail using wave coupling theory of linear electro-optic effect. The study result demonstrates that only the amplitude of output light is modulated, and the polarization state does not change at all. Phase shift brought by natural binary refraction does not exist in the modulator, there is no zero-field leakage, temperature stability is very good, and insertion loss is small. And it can be used as variable optical attenuator and electro-optic detector, too。     

A polymer electro-optic modulator with ultra wide-band and low driving voltage

In this paper, a polymer electro-optic modulator is designed and simulated using the full vectorial finite element method. First order edge elements are used in finite element implementation, and the finite element technique is used to obtain modulator response thoroughly. From the numerical analysis, frequency dispersions of modulator’s important parameters, such as microwave effective index nm , microwave characteristic impedance ZC and microwave loss a, are extracted. Our design exhibits elec...     

Sigma-Delta 调制器的建模、分析和设计

This paper introduces a new method for SC sigma–delta modulator modeling. It studies the integrator's different equivalent circuits in the integrating and sampling phases. This model uses the OP-AMP input pair's tail current (I₀) and overdrive voltage (v_on) as variables. The modulator's static and dynamic errors are analyzed. A group of optimized I₀ and v_on for maximum SNR and power × area ratio can be obtained through this model. As examples, a MASH21 modulator for digital audio and a second order modulator for RFID baseband are implemented and tested, and they can achieve 91 dB and 72 dB respectively, which verifies the modeling and design criteria.     

Design of a high-order single-loop Σ△ ADC followed by a decimator in 0.18μm CMOS technology

This work presents an oversampled high-order single-loop single-bit sigma–delta analog-to-digital converter followed by a multi-stage decimation filter.Design details and measurement results for the whole chip are presented for a TSMC 0.18μm CMOS implementation to achieve virtually ideal 16-b performance over a baseband of 640 kHz.The modulator in this work is a fully differential circuit that operates from a single 1.8 V power supply. With an oversampling ratio of 64 and a clock rate of 81.92 MHz,the modulator achieves a 94 dB dynamic range. The decimator achieves a pass-band ripple of less than 0.01 dB,a stop-band attenuation of 80 dB and a transition band from 640 to 740 kHz.The whole chip consumes only 56 mW for a 1.28 MHz output rate and occupies a die area of 1×2 mm^2.     

Design of New SAW DQPSK Matched Filter

A new surface acoustic Wave differential quadraphase shift key（SAW DQPSK） spread spectrum （SS） signal matched filter based on the fusion of SS and differential modulation is reported. The design of multi-phase coded SAW matched filter is proposed rather than another design of SAW DQPSK filter, which can cut in a half of the delay time of SAW DQPSK matched filter and SAW fixed delay line（FDL） used for differential demodulation. This breakthrough is made the system largely reduce a size and process much easily. This method can also be feasible in other SAW MPSK matched filter design especially when the modulation phase number is larger than 4. The design example and its experimental results are given.     

Efficient design method of cosine-modulated QMF banks satisfying PR property

In this paper the design problem of perfect-reconstruction cosine-modulated QMF banks has been formulated as a quadratic-constrained least-squares (QCLS) minimization problem in which all constrained matrices of the QCLS optimization problem are symmetric and positive definite. A cost function which is a convex function of desired prototype filter coefficients is constructed so that this kind of QCLS optimization problems can be efficiently solved. So a global minimizer of this problem can be easily obtained. Results of two design examples are presented to support the derivations and analyses.     

A 18-mW,20-MHz bandwidth,12-bit continuous-time∑△modulator using a power-efficient multi-stage amplifier

正A fourth-order continuous-time sigma delta modulator with 20-MHz bandwidth,implemented in 130nm CMOS technology is presented.The modulator is comprised of an active-RC operational-amplifier based loop filter,a 4-bit internal quantizer and three current steering feedback DACs.A three-stage amplifier with low power is designed to satisfy the requirement of high dc gain and high gain-bandwidth product of the loop filter.Non-return-to -zero DAC pulse shaping is utilized to reduce clock jitter sensitivity.A special layout technique guarantees that the main feedback DAC reaches 12-bit match accuracy,avoiding the use of a dynamic element matching algorithm to induce excess loop delay.The experimental results demonstrate a 64.6-dB peak signal-to-noise ratio,and 66-dB dynamic range over a 20-MHz signal bandwidth when clocked at 480 MHz with 18-mW power consumption from a 1.2-V supply.     

Steady-State Solution for a Three-State Kalman Filter Using Range,Range Rate and Range Acceleration Measurements

A closed-form steady-state solution is derived for a three-state Kalman filter which estimates the range, range rate and range acceleration when range, range rate and range acceleration are measured. For simplifying the expressions of the solution, a new normalization of the steady-state error covariance is introduced. Minimum values of the normalized steady-state error variances of a three-state Kalman filter are obtained. The solutions can be applied to tracking filter performance prediction and constant gain filter design.     

Design of Unequal Thickness Interference Filters with Quarter Wavelength Stack

A system of unequal thickness interference filters with quarter wavelength stack which consists of a spacer surrounded by two multiplayer stacks is designed, and the examples of the filter design are given.This kind of filters are not only characterized by high-transparency, but also by high-reflection, therefore, it is superior to the common equal thickness interference system with quarter wavelength.it is easier to control the manufacturing techniques of the new design as compared with that of interference filter of non-quarter wavelength.     

A fourth-order bandwidth-reconfigurable delta-sigma modulator for audio applications

正A single loop fourth-order delta-sigma modulator is presented for audio applications.A reconfigurable mechanism is adopted for two bandwidth-based modes(8 kHz/16 kHz).Manufactured in the SMIC 0.13μm CMOS mixed signal process,the chip consumes low power(153.6μW) and occupies a core area of 0.98×0.46 mm~2.The presented modulator achieves an 89.3 dB SNR and 90.2 dB dynamic range in 16 kHz mode,as well as a 90.2 dB SNR and 86 dB dynamic range in 8 kHz mode.The designed modulator shows a very competitive figure of merit among state-of-the-art low voltage modulators.