Planar MESFET grid oscillators using gate feedback

A method for quasi-optically combining the output power of MESFETs in which drain and source leads couple directly to the radiated field is introduced. The design consists of a planar grid of devices placed in a Fabry-Perot cavity. Capacitive feedback is provided to the gate, allowing oscillation at much higher frequencies than previous grids. The oscillation frequency is dependent on the device characteristics, the resonator cavity, and the symmetries of the grid. A transmission-line model for the grid is discussed and used to design two oscillator arrays. A 16-element grid has produced 335 mW of power at 11.6 GHz with a DC-to-RF conversion efficiency of 20%. This design was scaled to produce a 36-element grid oscillator with output power of 235 mW at 17 GHz. These results represent a significant improvement in the performance of planar grid oscillators. The planar configuration of the grid is very convenient for monolithic integration and is easily scalable to millimeter-wave frequencies     

An 8 GHz high power AlGaN/GaN HEMT VCO

A high power X-band hybrid microwave integrated voltage controlled oscillator(VCO) based on Al-GaN /GaN HEMT is presented.The oscillator design utilizes a common-gate negative resistance structure with open and short-circuit stub microstrip lines as the main resonator for a high Q factor.The VCO operating at 20 V drain bias and-1.9 V gate bias exhibits an output power of 28 dBm at the center frequency of 8.15 GHz with an efficiency of 21%.Phase noise is estimated to be -85 dBc/Hz at 100 kHz offset and -1...     

一个8GHz高功率AlGaN/GaN HEMT VCO

基于中科院微电子所的AlGaN/GaN HEMT工艺研制了一个X波段高功率混合集成压控振荡器（VCO）。电路采用源端调谐的负阻型结构,主谐振腔由开路微带和短路微带并联构成,实现高Q值设计。在偏置条件为VD=20V, VG=-1.9V, ID=150mA时,VCO在中心频率8.15 GHz处输出功率达到28 dBm,效率21%,相位噪声-85 dBc/Hz@100 KHz,-128 dBc/Hz@1 MHz。调谐电压0~5V时,调谐范围50 MHz。分析了器件闪烁噪声对GaN HEMT基振荡器相位噪声性能的主导作用。测试结果显示了AlGaN/GaN HEMT工艺在高功率低噪声微波频率源中的应用前景。     

An X-band integrated circuit FET oscillator with dielectric resonator stabilization

Experimental results are presented for the performance of a MIC common drain GaAs FET oscillator and are compared with the performance of the same oscillator stabilized by using a high Q. temperature compensated dielectric resonator made from barium nonatitanate. The unstabilized oscillator gave 85 mW of Rf power at an efficiency of 20%. whilst the compensated oscillator gave 46 mW of power at an efficiency of 12%. with a line width of only 0.3 MHz as measured at 60 dB below the peak. Over the temperature range 0 to 60°C the frequency of the stabilized oscillator changed only 5 MHz, compared t0 the 30 MHz change found in unstabilized oscillators. Mechanical tuning was easily achieved, and careful choice of coupling between the resonator and oscillator eliminated the hysteresis observed in the mode of oscillation of designs previously reported.     

An efficient X-band 16-element spatial combiner of switched-mode power amplifiers

This paper describes the design, implementation, and characterization of a high-efficiency 10-GHz amplifier antenna array for spatial power combining. An average drain efficiency of 70% at 162 W effective isotropic radiated power, or about 1.5 W of transmitted power, is measured for an array of 16 amplifiers consisting of four four-element subarrays. The power-combining efficiency of the 16-element array is above 79%. The active device is a low-cost GaAs MESFET with a maximum available power in class A of 21 dBm. The single class-E power amplifier delivers 20.3 dBm with 67% drain efficiency and 58% power-added efficiency.     

A planar 4.5-GHz DC-DC power converter

In this paper, we present two DC-DC converters that operate at a microwave frequency. The first converter consists of a class-E switched-mode microwave amplifier, which performs the DC-AC conversion, and two half-wave diode rectifier outputs. The class-E MESFET amplifier has a minimum power-added efficiency of 86%, corresponding drain efficiency of 95%, and 120 mW of output power at 4.5 GHz. The diode rectifier has a maximum conversion efficiency of 98% and an overall efficiency of 83%. The second converter consists of a high-efficiency class-E oscillator and a diode rectifier. The class-E oscillator has a maximum efficiency of 57% and maximum output power of 725 mW. The DC-DC converter is planar and compact, with no magnetic components, and with a maximum overall DC-DC conversion efficiency of 64% for a DC input of 3 V, and the output voltage across a 87-Ω load of 2.15 V     

Waveguide cavity FET oscillator

A new single-tuned oscillator, applicable to power combining circuits, is described in which a probe antenna is used to provide coupling between an active device and the cavity. It is shown that output power, oscillation frequency and injection locking range of the oscillator can be controlled independently in the circuit design. The experiments with low-power FET oscillators demonstrate output power of 44 mW at 9.2 GHz and DC-RF conversion efficiency of 33.2% from a single-device oscillator and about 100% of power combining efficiency in the case of two- and three-device circuits.     

基于GaN HEMT的高效率Doherty功率放大器设计

通过分析传统Doherty功放的负载调制网络存在的带宽限制和晶体管输出电容对于效率的影响问题。利用改善阻抗变换比和补偿载波功放晶体管的输出电容的方法提出一种新型负载调制网络,使用GaN HEMT晶体管并基于此网络设计完成了一款高效率的Doherty功率放大器。该Doherty功率放大器采用不等分结构设计。此外,采用阶跃式阻抗匹配方法设计主辅功放的输入输出匹配网络来拓展Doherty功放的工作带宽。测试结果显示,在2.8~3.2 GHz频段内,饱和输出功率达到45 dBm,饱和漏极效率65%~73.18%。功率回退6 dB时,漏极效率在45%~50%之间,功率回退9 dB时,漏极效率在38.94%~44.68%之间。     

Class-E MOSFET tuned power oscillator design procedure

A complete design procedure of a Class-E oscillator for a duty cycle of 0.5 is presented. It is based on an analytical solution of equations, which describe oscillator operation for steady state. General equations for all oscillator component values are given. Using the proposed procedure, the components were calculated for an example oscillator. The oscillator was built and tested using an MTP3055E power MOSFET. The efficiency and output power versus frequency, and the oscillation frequency versus dc supply voltage were measured. At V/sub DD/=4.5 V, the measured oscillation frequency was 800 kHz, the output power was 0.953 W, and the efficiency was 82%.     

Modified class-F distributed amplifier

The class-F power amplifier is known for its high efficiency. The class-F single-ended dual-fed distributed amplifier integrates both class-F amplification and efficient power combining in the one circuit, without using additional n-way power combiners. In this letter the earlier reported circuit topology and design method is modified to account for drain parasitic reactances. A 1.8-GHz amplifier employing two packaged field effect transistors was designed and tested. The measured drain dc efficiency and corresponding output power with an input generator available power of 14 dBm was 71% and 22dBm, respectively.     

Fully Integrated CMOS Power Amplifier With Efficiency Enhancement at Power Back-Off

This paper presents a new approach for power amplifier design using deep submicron CMOS technologies. A transformer based voltage combiner is proposed to combine power generated from several low-voltage CMOS amplifiers. Unlike other voltage combining transformers, the architecture presented in this paper provides greater flexibility to access and control the individual amplifiers in a voltage combined amplifier. In this work, this voltage combining transformer has been utilized to control output power and improve average efficiency at power back-off. This technique does not degrade instantaneous efficiency at peak power and maintains voltage gain with power back-off. A 1.2 V, 2.4 GHz fully integrated CMOS power amplifier prototype was implemented with thin-oxide transistors in a 0.13 mum RF-CMOS process to demonstrate the concept. Neither off-chip components nor bondwires are used for output matching. The power amplifier transmits 24 dBm power with 25% drain efficiency at 1 dB compression point. When driven into saturation, it transmits 27 dBm peak power with 32% drain efficiency. At power back-off, efficiency is greatly improved in the prototype which employs average efficiency enhancement circuitry.     

Fully integrated 60-GHz single-ended resistive mixer in 90-nm CMOS technology

This letter presents the design and characterization of a fully integrated 60-GHz single-ended resistive mixer in a 90-nm CMOS technology. A conversion loss of 11.6dB, 1-dB compression point of 6dBm and IIP3 of 16.5dBm were measured with a local oscillator (LO) power of 4dBm and zero drain bias. The possibility of improvement in IIP3 with selective drain bias has been verified. A 3-dB improvement in IIP3 was obtained with 150-mV dc voltage applied at the drain. Microstrip transmission lines are used to realize matching and filtering at LO and radio frequency ports.     

A GaAs MESFET Oscillator Quasi-Linear Design Method

A simplified quasi-linear method is proposed to design a GaAs MESFET oscillator. By expressing the generated power P/sub gen/ as a function of FET gate and drain RF voltages, it is possible to maximize P/sub gen/ under the limiting conditions on intrinsic FET terminal voltage amplitudes. The feedback circuit elements to realize a GaAs MESFET oscillator are derived. An X-band GaAs MESFET oscillator was designed by the quasi-linear method and was fabricated by using microwave integrated-circuit technology.     

RF Class-D Amplification With Bandpass Sigma–Delta Modulator Drive Signals

The power efficiency of a RF Class-D amplifier with a bandpass sigma-delta (SigmaDeltaM) modulator is analyzed for a complementary voltage-switched configuration. The modulator broadens the application of the amplifier to include signals with time varying envelopes such as W-CDMA. The addition of a modulator introduces new design variables which affect amplifier power efficiency including coding efficiency and the average transition frequency of the pulse train. Design equations are derived for the optimum load impedance, output power, conduction losses, capacitive switching losses, and drain efficiency. The general design equations are consistent with both periodic and aperiodic drive signals. Analytic and simulated results are compared for an example design with pseudomorphic high-electron mobility transistor and metal-semiconductor field-effect transistor switches with a fourth-order bandpass SigmaDeltaM. The results show a drain efficiency of 52% with a 10-dB peak-to-average power ratio W-CDMA source signal at a frequency of 500 MHz     

A two-dimensional quasi-optical power combining oscillator array with external injection locking

A quasi-optical power combiner for a 4/spl times/4 IMPATT oscillator array has been designed and experimentally investigated. The combiner consists of a bi-periodic dielectric phase grating which transforms the near field of a rectangular horn array into a pseudoplane wave. The horn array is excited by oscillators which operate uniformly in both amplitude and phase. A parabolic mirror with a superimposed surface relief couples the pseudoplane wave into a rectangular output horn antenna. In principle, the combiner has no restriction in inter-element spacing and is hence scalable up to submillimeter wavelengths without degradation of power combining efficiency. The quasi-optical design has been verified by scalar field measurements in several planes. The oscillator matrix is injection-locked by a master oscillator from the output port. A continuous wave output power of 1.3 W with an overall power combining efficiency of 70% has been measured at 65 GHz.     

基于GaN HEMT 器件的宽带高效功率放大器

介绍一种宽带高效放大器设计方法,并基于GaN HEMT器件研制了宽带高效功率放大器。采用源牵引和负载牵引方法获得适应宽带条件的最佳源阻抗和负载阻抗,然后综合宽带匹配网络并实现测试电路设计。实测结果表明,该放大器在0.9～2.7GHz工作频带范围内,放大器输出功率均大于10W,工作效率在51%～72%之间,增益大于13dB。为改善放大器线性度指标,采用商用预失真芯片搭建简单的预失真电路对放大器进行线性化校正,并给出了详细的测试结果。     

S波段高效GaN逆E类功率放大器

介绍一种高效逆E类功率放大器的设计方法,并选用GaN器件设计了工作于2.3GHz的逆E类功率放大器。当供电26V,输入功率26dBm时,放大器输出功率40.2dBm,工作效率76.1%,PAE为73.3%。提供了详尽的仿真与实测数据并对放大器性能进行分析。用数字预失真技术对逆E类功率放大器进行线性化校正并取得了良好的效果。     

Small-Size X-Band Active Integrated Antenna With Feedback Loop

A small-sized active integrated antenna (AIA), consisting of a transmission feedback oscillator loaded with a microstrip antenna is presented in this paper. The oscillator antenna, which consists of a NEC super low noise high frequency field effect transistor (HF FET) integrated into the center of a segmented patch antenna, was designed for X-band at 8.50 GHz, and occupies a 5 times 6 mm² area. The active integrated antenna demonstrates stable oscillations and excellent radiation patterns at X-band design frequencies. When biased using a single 1.5 volt battery connected between the source and drain and with the gate terminal open, the antenna effective isotropic radiated power (EIRP) and direct current (DC)-to-radiated radio frequency (RF) conversion efficiency are +11.2 dBm and 10.5%, respectively. The radiated power level and directivity are +4.5 dBm and 6.7 dBi, respectively. The phase noise at 100 kHz offset from the carrier is -87.5 dBc/Hz, which is a notable improvement over existing AIA designs. The AIA features compact size and simple geometry, yet provides radiated power levels and radiation efficiencies that are comparable to values typically obtained using circuits that occupy larger areas, and use thicker substrates with much lower dielectric constant values.     

基于EFJ模式的宽带高效率Doherty功率放大器设计

将EFJ模式功率放大器应用于Doherty功率放大器的载波功率放大器,利用EFJ类功率放大器的阻抗特性改善了Doherty功率放大器的带宽。此外,还引入后谐波控制网络来提高Doherty功率放大器的效率。功放的输入匹配电路采用阶跃式阻抗匹配来进一步拓展工作带宽。使用CGH40010F GaN 晶体管设计并加工完成了一款宽带高效率Doherty功率放大器。测试结果显示,在3.2~3.7GHz 频段内,饱和输出功率达到43dBm,饱和漏极效率60%~72.5%,增益大于10dB。功率回退6dB时,漏极效率40%~48.5%。     

High-Efficiency Broadband Parallel-Circuit Class E RF Power Amplifier With Reactance-Compensation Technique

Class E amplifier offers high efficiency approaching 100% for an ideal case. This paper introduces a first practical implementation of a novel broadband class E power amplifier design combining a parallel-circuit load network with a reactance compensation technique. The novel broadband parallel-circuit class E load network using reactance compensation technique has been discussed based on theory and its experimental verification. A proper guidelines method of designing a high-efficiency broadband class E power amplifier with an LDMOS transistor until the final prototype measurement and optimization will be discussed. In the measurement level, the drain efficiency of 74% at an operating power of 8 W and power flatness of 0.7 dB are achieved across a bandwidth of 136-174 MHz. The efficiency result is the highest result for VHF broadband frequency to date with a low supply voltage of 7.2 V. Simulations of the efficiency, output power, drain voltage waveform, and load angle (impedance) were verified by measurements and good agreements were obtained.