Pseudomorphic high electron mobility transistor monolithic microwave integrated circuits reliability study

Accelerated high temperature RF life testing was used to investigate the reliability of two-stage GaAs monolithic microwave integrated circuit (MMIC) power amplifiers based on 0.25 μm pseudomorphic high electron mobility transistor technology. Life testing was performed at elevated baseplate temperatures with MMICs operating at typical d.c. bias conditions and large signal RF drive levels of two dB compression. The resulting failure distribution was log normal and the estimated median life time extrapolated to a channel temperature of 140°C was 2.3×10⁶ h with an activation energy of 1.1 eV.     

Low-noise high electron mobility transistors for monolithic microwave integrated circuits

High electron mobility transistors (HEMT's) for monolithic microwave integrated circuits have been fabricated that have demonstrated excellent performance. External transconductance of 300 mS/mm is observed and noise figures of 1 and 1.8 dB with associated gains of 16.1 and 11.3 dB at 8 and 18 GHz, respectively, have been measured. These are comparable to the best reported noise figures for either HEMT's or MESFET's and are the highest associated gains reported for such low-noise figures. Analysis of these devices indicates that further improvements in these results is possible through optimization of HEMT layers and fabrication technology to reduce gate-source parasitic resistance.     

Quarter-micron gate length microwave high electron mobility transistor

Quarter-micron gate length high electron mobility transistors have been fabricated using an electron-beam direct-writing technique. A maximum stable gain of 10 dB at 18 GHz has been measured at room temperature. A room-temperature cutoff frequency fT as high as 45 GHz has also been obtained.     

A microwave power double-heterojunction high electron mobility transistor

A microwave power high electron mobility transistor (HEMT) has been developed and tested in theK-band frequency range. The HEMT has a unique configuration of a selectively low-doped (AlGa)As/GaAs/(AlGa)As double heterojunction resulting in both capability of high-current density and high gate breakdown voltage. The structure showed electron mobility of 6800 cm²/V.s and two-dimensional (2-D) electron density as high as 1.2 × 10¹²cm^-2at room temperature. An output power of 660 mW (550 mW/mm) with 3.2-dB gain and 19.3-percent power added efficiency was achieved at 20 GHz with 1-µm gate length and 1.2-mm gate periphery. A similar device with 2.4-mm gate width produced an output power of 1 W with 3-dB gain and 15.5-percent efficiency. These results offer microwave high power capability in a double-heterojunction HEMT (DH-HEMT).     

A traveling-wave high electron mobility transistor

A traveling-wave high electron mobility transistor (THEMT) is proposed. The device is unique in that it includes an integral distributed load resistor and uses a HEMT as the active device. A rigorous analysis of the device is carried out, using a small-signal equivalent circuit model for an incremental section of the device. Losses and reflected waves are not neglected, as has been done in other work. Treating the device as a four-port network, closed-form expressions for S-parameters are derived. Theoretical calculations, using equivalent circuit parameter values for a HEMT reported in the literature, show that the proposed device is capable of exponential increase in gain with device width. Power gain of more than 10 dB at 50 GHz and remarkably flat response in the frequency range 10-100 GHz are shown to be achievable for a 1-mm-wide device     

高电子迁移率晶体管新结构

介绍了通过插入ＩｎＡｓ层到ＩｎＧａＡｓ沟道中，改善了ＩｎＡｌＡｓ／ＩｎＧａＡｓ高电子迁移率晶体管（ＨＥＭＴ）的性质，合适的ＩｎＡｓ层厚度和准确的插入位置会使在３００Ｋ时此结构的ＨＥＭＴ比普通结构的ＨＥＭＴ的迁移率和电子速度分别提高３０％和１５％。     

InGaAsP/InP monolithic integrated circuit with lasers and an optical switch

InGaAs/InP monolithic integrated circuits composed of a compact carrier-injection optical switch and distributed feedback laser diodes are fabricated. These integrated circuits have a variety of functions, such as monolithic modulators, switches and optical amplifiers for optical communication systems.     

Two-dimensional numerical analysis of the high electron mobility transistor

We develop a two-dimensional model for the high electron mobility transistor (HEMT) including conduction outside the quantum well. The model uses the continuity and power balance moment equations for both inside and outside the well, with electron concentration and average energy as dependent variables, and with parameters determined by Monte Carlo simulation. We show that conduction outside the well is dominant in the "pinchoff" region and that consequently the speed advantage of the HEMT over conventional devices does not arise from high saturation velocities in the quantum well but rather from a lower access resistance as suggested by a velocity profile calculation. It is further demonstrated that several effects which are unimportant in conventional FET's are of significance in the HEMT. Among these effects are electronic heat conduction and to some extent real space transfer.     

Two-dimensional numerical model for the high electron mobility transistor

A two-dimensional numerical drift-diffusion model for the High Electron Mobility Transistor (HEMT) is presented. Special attention is paid to the modeling of the current flow over the heterojunction. A finite difference scheme is used to solve the equations, and a variable mesh spacing was implemented to cope with the strong variations of functions near the heterojunction. Simulation results are compared to experimental data for a 0.7 μm gate length device. Small-signal transconductances and cut-off frequency obtained from the 2-D model agree well with the experimental values from S-parameter measurements. It is shown that the numerical models give good insight into device behaviour, including important parasitic effects such as electron injection into the bulk GaAs.     

Circuit simulation models for the high electron mobility transistor

A three-terminal model is formulated for the high electron mobility transistor (HEMT) using charge-voltage relationships derived from the Boltzmann transport. Emphasis is placed on modeling the current transport of the two-dimensional electron gas (TEG) and the capacitance of the embedded parasitic MESFET structure. Furthermore, a distributed circuit topology is used to better model high-frequency effects, such as the transit time delay, in both small-signal and large-signal-transient analysis. The HEMT model is implemented in the circuit simulation program HP-SPICE. Both dc and ac simulation results are discussed.     

MOS-bipolar monolithic integrated circuit technology

A technique for the fabrication of p-channel MOS transistors and bipolar transistors within monolithic integrated circuits is described. Total process compatibility has been achieved without compromising either the n-p-n bipolar or p-channel MOS characteristics. The technology developed is similar to that used for conventional integrated circuits until the channel oxidation step, A low temperature oxidation followed by a high temperature anneal process that produces negligible changes in preceding diffusion profiles was used to form this oxide. Bias temperature tests of MOS capacitors have shown the oxide to be reproducibly free of contamination. A high slew rate MOS bipolar operational amplifier has been designed and fabricated on 0.045- by 0.045-in chip using the new technology. Typical characteristics are slew rate =80 V/µs voltage gain = 70 dB. The MOS transistors are used as active loads and level shifters in this circuit and provide a much improved frequency response over conventional circuits using p-n-p lateral transistors.     

A microwave model for high electron mobility transistors

In this paper, the authors present a high-frequency model for the high electron mobility transistor (HEMT). The model includes the distributed effects in the channel of the device through two newly developed wave equations in the linear and saturation regimes. The equations are solved taking into account the electric fields along and perpendicular to the flow of the current. The Y and S parameters are derived and the theoretical predictions of the model are compared with the experimental data and shown to be in good agreement over a wide range of frequencies     

Breakdown quenching in high electron mobility transistor by usingbody contact

In this paper, the effect of a body contact (BC) to quench breakdown effects and increase the breakdown voltage in high-electron mobility transistors (HEMTs) is theoretically investigated. The body contact is formed by a highly p-type doped substrate connected to an ohmic back contact. By means of a two-dimensional (2-D) self consistent Monte Carlo simulator we show that the BC prevents holes generated by impact ionization (II) from accumulating in the channel and in the buffer, thus inhibiting the parasitic bipolar effect (PBE). This improves the breakdown behavior and extends the range of the usable drain voltages     

Photoluminescence evaluation of pseudomorphic high electron mobility transistor device waters

Photoluminescence (PL) has been used for some time the evaluation of pseudomorphic high electron mobility transistor material structures. Among the results routinely obtained from these structures are estimates of electron sheet density in the InGaAs channel, either from empirical relationships or from first principles (from direct observation of the Fermi level). We present a semiempirical line shape model for the study of PL line shapes at low temperatures. We show that the primary source of error for optical measurement of the sheet density is in the filling of the channel by electrons injected by the incident laser. We also demonstrate the potential for extraction of structural parameters such as channel composition and thickness from careful observation of variations in PL transition energies.     

Effect of traps on low-temperature high electron mobility transistor characteristics

The I-V characteristics of MBE-grown AlGaAs/GaAs high electron mobility transistors (HEMT's) are studied using a bias and temperature sequence between 77 and 300 K to control trap occupancy. Low-temperature threshold voltage, transconductance, and saturation current are found to be either increased or decreased significantly relative to their 300 K values depending on the gate bias condition during cool down. This behavior is shown to be caused by variations in trap occupancy in the highly doped AlGaAs layer.     

Two-dimensional transient simulation of an idealized high electron mobility transistor

We develop a model for the high electron mobility transistor (HEMT) in which we include both hot-electron effects and conduction outside the quantum subband system using hydrodynamic-like transport equations. With such a model we can assess the significance of the various physical phenomena involved in the operation of the HEMT. We calculate results with a two-dimensional numerical technique for both steady-state and transient operation. For a 3-µm device at 77 K, we determine a transconductance of 450 mS/mm, a current-switching speed of 6 ps, and a capacitive charging speed of 4 ps/fanout gate which corresponds to the performance measured by other workers. We also see that electronic heating, velocity overshoot, and conduction outside the quantum well are significant near the pinchoff point. We conclude that the advantage of HEMT is twofold. The excellent conduction in the quantum well results in a low access resistance, and the low impurity concentration in the GaAs results in optimum overshoot effects.     

A high-speed 1-kbit high electron mobility transistor static RAM

A 1-kbit static RAM with enhancement and depletion-mode devices was designed and fabricated using the high electron mobility transistor (HEMT) technology. The RAM circuit was optimized to achieve ultra-high-speed performance. A subnanosecond address access time of 0.6 ns was measured at room temperature for a total power dissipation of 450 mW. The minimum WRITE-ENABLE pulse width required to change the state of memory cell is less than 2 ns on probe testing. The best chip has 3 bits that failed to function, which corresponds to a bit yield of 99.7 percent. According to the simulation, variations of the threshold voltage inside the memory cell greatly reduce its stable functional range. High-speed operation requires more uniform threshold voltage control to achieve fully operational LSI memory circuits.     

Low base resistance integrated circuit transistor

The design of a transistor with a very low base resistance is presented. This transistor, manufactured in a standard IC-process, has been designed especially for the input stage of amplifiers for very low impedance transducers, such as moving coil phonocartridges (MCC) and thermocouples. The base spreading and aluminium interconnection resistances have been minimized by careful geometrical design within the constraints of the process. The total equivalent noise voltage of this transistor corresponds to the thermal noise of a resistor of 1.4 /spl Omega/.     

A 40-ps high electron mobility transistor 4.1 K gate array

A high-electron mobility transistor (HEMT) 4.1 K-gate array has been developed, using a selective dry etching process and a MBE (molecular-beam epitaxy) growth technology. The circuit design uses direct-coupled FET logic (DCFL). The chip contains 4096 NOR gates, each with a 0.8-μm gate length, and measures 6.3 mm×4.8 mm. A basic gate delay of 40 ps has been achieved. A 16×16-bit parallel multiplier, used to test this array, has a multiplication time of 4.1 ns at 300 K, where the power dissipation is 6.2 W