Multi‐granular,multi‐purpose and multi‐Gb/s monitoring on off‐the‐shelf systems

As an attempt to make network managers’ life easier, we present M³Omon , a system architecture that helps to develop monitoring applications and perform network diagnosis. M³Omon behaves as an intermediate layer between the traffic and monitoring applications that provides advanced features, high performance and low cost. Such advanced features leverage a multi‐granular and multi‐purpose approach to the monitoring problem. Multi‐granular monitoring provides answers to tasks that use traffic aggregates to identify an event, and requires either flow records or packet data or even both to understand it and, eventually, take convenient countermeasures. M³Omon provides a simple API to access traffic simultaneously at several different granularities, i.e. packet‐level, flow‐level and aggregate statistics. The multi‐purposed design of M³Omon allows not only performing tasks in parallel that are specifically targeted to different traffic‐related purposes (e.g. traffic classification and intrusion detection) but also sharing granularities between applications, e.g. several concurrent applications fed from flow records that are provided by M³Omon . Finally, the low‐cost characteristic is brought by off‐the‐shelf systems (the combination of open‐source software and commodity hardware) and the high performance is achieved thanks to modifications in the standard NIC driver, low‐level hardware interaction, efficient memory management and programming optimization. Copyright © 2014 John Wiley & Sons, Ltd.     

All-optical in-band OSNR monitoring at 40 Gb/s using a nonlinear optical loop mirror

We present an all-optical in-band optical signal-to-noise ratio (OSNR) monitor using a nonlinear optical loop mirror. Monitoring is enabled from the nonlinear power transfer function of the loop mirror. Experimental results are provided at 40 Gb/s for three modulation formats: nonreturn-to-zero, carrier-suppressed return-to-zero, and return-to-zero. The monitor discriminates the various OSNR levels over a dynamic range of more than 25 dB with every modulation format.     

Multi-thousand kilometer optical soliton data transmissionexperiments at 5 Gb/s using an electroabsorption modulator pulsegenerator

We have demonstrated the transmission of data-coded optical soliton pulse at the bit-rate of 5 Gb/s over a few thousand kilometers. Ultra-short optical pulses generated with a sinusoidally driven electroabsorption modulator and a DFB-LD that were approximately hyperbolic-secant squared shape were transmitted through the fiber. Both recirculating loop transmission lines and straight transmission lines were used for the experiments. The pulse width was maintained well over 6,000 km transmission in the recirculating loop experiment. Three-thousand-km stable transmission was achieved using a straight-line setup at the bit-rate of 5 Gb/s, although the average fiber chromatic dispersion deviated slightly from the optimum value. The results indicate the possibility of the soliton transmission system for multi-thousand-km optical communication systems     

Design and Implementation of Open‐Loop Clock Recovery Circuit for 39.8 Gb/s and 42.8 Gb/s Dual‐Mode Operation

This paper proposes an open‐loop clock recovery circuit (CRC) using two high‐Q dielectric resonator (DR) filters for 39.8 Gb/s and 42.8 Gb/s dual‐mode operation. The DR filters are fabricated to obtain high Q‐values of approximately 950 at the 40 GHz band and to suppress spurious resonant modes up to 45 GHz. The CRC is implemented in a compact module by integrating the DR filters with other circuits in the CRC. The peak‐to‐peak and RMS jitter values of the clock signals recovered from 39.8 Gb/s and 42.8 Gb/s pseudo‐random binary sequence (PRBS) data with a word length of 2³¹?1 are less than 2.0 ps and 0.3 ps, respectively. The peak‐to‐peak amplitudes of the recovered clocks are quite stable and within the range of 2.5 V to 2.7 V, even when the input data signals vary from 150 mV to 500 mV. Error‐free operation of the 40 Gb/s‐class optical receiver with the dual‐mode CRC is confirmed at both 39.8 Gb/s and 42.8 Gb/s data rates.     

Penalty-free error-free all-optical data pulse regeneration at 84Gb/s by using a symmetric-Mach-Zehnder-type semiconductor regenerator

Penalty-free data-pulse regeneration at 84 Gb/s was achieved down to an error rate level of 1×10^-11 by using a data pattern length of 2³¹-1. A symmetric-Mach-Zehnder-type all-optical polarization-insensitive semiconductor regenerator was used     

Photonic gateway: multiplexing format conversions of OCDM-to-WDM and WDM-to-OCDM at 40 Gb/s (4/spl times/10 Gb/s)

Photonic gateway, which performs the bilateral conversion and reconversion of multiplexing format, is proposed. 40-Gb/s (4/spl times/10 Gb/s) optical code-division multiplexing (OCDM)-to-wavelength-division multiplexing (WDM) conversion and WDM-to-OCDM reconversion are experimentally demonstrated for the first time. The experimental scheme is based upon ultrafast photonic processing both in the time domain and frequency domain, namely, optical encoding/decoding along with optical time-gating in the time domain and supercontinuum generation followed by spectrum slicing in the frequency domain. Thus, the possibility of ultra-high-speed operation features this photonic conversion scheme in the future photonic networks.     

Performance analysis and hardware implementation of a nearly optimal buffer management scheme for high‐performance shared‐memory switches

Burst traffic is a common traffic pattern in modern IP networks, and it may lead to the unfairness problem and seriously degrade the performance of switches and routers. From the perspective of switching mechanism, the majority of commercial switches adopt the on‐chip shared‐memory switching architecture, and high‐speed packet buffer with efficient queue management is required to deal with the unfairness and congestion problem. In this paper, the performance of a shared‐private buffer management scheme is analyzed in detail. In the proposed scheme, the total memory space is split into shared area and private area. Each output port has a private memory area that cannot be used by other ports. The shared area is completely shared among all output ports. A theoretical queuing model of the proposed scheme is formulated, and closed‐form formulas for multiple performance parameters are derived. Through the numerical studies, we demonstrate that a nearly optimal buffer partition policy can be obtained by setting an equally small amount of private area for each queue. This work is validated by simulations as well as hardware experiments. Software simulations show that the proposed scheme performs better than existing methods, and packet dropping caused by burst traffic can be significantly reduced. Besides, a prototype of the buffer management module is implemented and evaluated in field programmable gate array platform. The evaluation shows that the proposed scheme can ensure the efficiency and fairness while keeping a high throughput in real workload.     

Multi‐carrier platform for wireless communications. Part 1: High‐performance,high‐throughput TDMA and DS‐CDMA via multi‐carrier implementations

Multi‐carrier technologies in general, and OFDM and MC‐CDMA in particular, are quickly becoming an integral part of the wireless landscape. In this first of a two‐part survey, the authors present the innovative transmit/receive multi‐carrier implementation of TDMA and DS‐CDMA systems. Specifically, at the transmit side, the pulse shape (in TDMA) and the chip shape (in DS‐CDMA) corresponds to a linear combining of in‐phase harmonics (called a CI signal). At the receiver side, traditional time‐domain processing (equalization in TDMA and RAKE reception in DS‐CDMA) is replaced by innovative frequency based processing. Here, receivers decompose pulse (or chip) shapes into carrier subcomponents and recombine these in a manner achieving both high frequency diversity gain and low MAI. The resulting system outperforms traditional TDMA and DS‐CDMA systems by 10–14 dB at typical BERs, and, by application of pseudo‐orthogonal pulse shapes (chip shapes), is able to double system throughput while maintaining performance gains of up to 8 dB. Copyright © 2002 John Wiley & Sons, Ltd.     

Coherent lightwave transmission over 150 km fibre lengths at 400 Mbit/s and 1 Gbit/s data rates using phase modulation

We report coherent lightwave systems experiments over 150 km employing phase modulation at speeds of 400 Mbit/s and 1 Gbit/s. Bit error rates lower than 10?9 were attained with no evidence of an error rate floor. Receiver sensitivities of ?53.3 dBm and ?44.5 dBm (10?9 BER) achieved at 400 Mbit/s and 1 Gbit/s with a new balanced mixer receiver correspond to improvements of 10.7 dB and 7.5 dB over the best previously published direct detection results.     

Study of the operating regime for all-optical passive 2Rregeneration of dispersion-managed RZ data at 40 Gb/s using in-lineNOLMs

In this letter, we numerically demonstrate that the use of inline nonlinear optical loop mirrors in strongly dispersion-managed transmission systems dominated by pulse distortion and amplitude noise can achieve all-optical passive 2R regeneration of a 40-Gb/s return-to-zero data stream. We define the tolerance limits of this result to the parameters of the input pulses     

140 Mbit/s receiver performance at 2.4 μm using InAsSbP detector

A 140 Mbit/s optical receiver has been demonstrated using for the first time an InAsSbP photodetector operating at room temperature and optimised for operation at 2.4 μm, close to the minimum-loss wavelength of fluoride fibre. The receiver sensitivity was measured to be -32 dBm at 140 Mbit/s and 2.4 μm     

Modeling and performance analysis of multi‐service wireless CDMA cellular networks using smart antennas

In this paper, we present an analytical model to assess the blocking capacity of multi‐service code division multiple access (CDMA) systems. We include smart antenna systems in our model and show how the capacity of CDMA systems can be improved if smart antennas are employed at the base stations. Applying smart antennas can actually transform CDMA systems from being interference limited to being channel/code limited. To investigate this effect, we extend our model to include the limitation of channelization codes in CDMA‐based universal mobile telecommunication system (UMTS) systems. From the point of view of the call admission control (CAC) in a smart antenna CDMA system, we can either accept the capacity loss due to code limitation, or we can additionally apply space division multiple access (SDMA) techniques to re‐use channelization codes and thus re‐approach the capacity which is obtained if no code limitation is considered. Copyright © 2008 John Wiley & Sons, Ltd.     

8 Gb/s 8:1 multiplexer and 1:8 demultiplexer IC's using GaAs DCFLcircuit

High-speed 8:1 multiplexer and 1:8 demultiplexer ICs composed of GaAs direct-coupled FET logic (DCFL) have been designed and fabricated. The ICs were designed with a tree-type architecture and using memory-cell-type flip-flops (MCFFs). Self-aligned GaAs MESFETs with a gate length of 0.5 μm were used in these ICs. The propagation delay time of the DCFL inverter was 19.0 ps/gate. Both ICs operated up to 8 Gb/s with power dissipations of 1.5 W for the multiplexer and 1.9 W for the demultiplexer at a single power supply voltage of 2.0 V. These ICs are applicable for multigigabit lightwave communication systems     

All-optical TDM data demultiplexing at 80 Gb/s with significant timing jitter tolerance using a fiber Bragg grating based rectangular pulse switching technology

We demonstrate the use of fiber Bragg grating based pulse-shaping technology to provide timing jitter tolerant data demultiplexing in an 80 Gb/s all-optical time division multiplexing (OTDM) system. Error-free demultiplexing operation is achieved with /spl sim/6 ps timing jitter tolerance using superstructured fiber Bragg grating based 1.7 ps soliton to 10 ps rectangular pulse conversion at the switching pulse input to a nonlinear optical loop mirror (NOLM) demultiplexer comprising highly nonlinear dispersion shifted fiber (HNLF). A 2-dB power-penalty improvement is obtained compared to demultiplexing without the pulse-shaping grating.     

A 40 Gb/s Clock and Data Recovery Module with Improved Phase‐Locked Loop Circuits

A 40 Gb/s clock and data recovery (CDR) module for a fiber‐optic receiver with improved phase‐locked loop (PLL) circuits has been successfully implemented. The PLL of the CDR module employs an improved D‐type flip‐flop frequency acquisition circuit, which helps to stabilize the CDR performance, to obtain faster frequency acquisition, and to reduce the time of recovering the lock state in the event of losing the lock state. The measured RMS jitter of the clock signal recovered from 40 Gb/s pseudo‐random binary sequence (2³¹‐1) data by the improved PLL clock recovery module is 210 fs. The CDR module also integrates a 40 Gb/s D‐FF decision circuit, demonstrating that it can produce clean retimed data using the recovered clock.     

Signal generation and transmission at 40, 80, and 160 Gb/s using a fiber-optical parametric pulse source

Short return-to-zero pulses (/spl sim/2 ps) are generated at bit rates of 40, 80, and 160 Gb/s using a fiber-optical parametric amplifier. The performance of the parametric pulse source is evaluated both back-to-back and in a 110-km transmission link. A receiver sensitivity of -33 dBm back-to-back was achieved after demultiplexing from 160 to 10 Gb/s. The power penalty at 160 Gb/s due to 110-km transmission was less than 2 dB. Very short pulses (0.5 ps) were also achieved when using the parametric amplifier as a compressor.     

Compact 2.5 Gb/s Burst‐Mode Receiver with Optimum APD Gain for XG‐PON1 and GPON Applications

This letter presents a compact 2.5 Gb/s burst‐mode receiver using the first reported monolithic amplifier IC developed with 0.25 …m SiGe BiCMOS technology. With optimum avalanche photodiode gain, the receiver module can obtain a fast response, high sensitivity and wide dynamic range, satisfying the overhead timing and various power specifications for a 2.5 Gb/s next‐generation passive optical network (PON), as well as a legacy 1.25 Gb/s PON in the upstream.     

A 1.7 Gb/s ASK and a 622 Mb/s incoherent FSK transmissionexperiment using a 1.55-μm multiquantum well distributed feedbacklaser

A multiple-quantum-well distributed-feedback (MQW-DFB) laser with narrow linewidth and low frequency chirp at low output power may experience linewidth rebroadening at high output power. the rebroadening is mostly due to a large carrier-induced change of refractive index, which also causes a large frequency modulation response for the MQW-DFB lasers. Using a 1.55-μm MQW-DFB laser, a 622-Mb/s amplitude-shift-keying (ASK) transmission experiment employing 200-km of fiber and an erbium-doped fiber amplifier has been demonstrated having a dispersion power penalty less than 9.8 dB. The receiver sensitivities at BER=10^-9 of the ASK system are -34.5 dBm and -42.5 dBm for 1.7-Gb/s and 622-Mb/s modulation, respectively. A 622-Mb/s incoherent frequency-shift-keying (FSK) transmission experiment using the same laser has also achieved a receiver sensitivity of -42.5 dBm     

Fabrication of Transimpedance Amplifier Module and Post‐Amplifier Module for 40 Gb/s Optical Communication Systems

The design and performance of an InGaAs/InP transimpedance amplifier and post amplifier for 40 Gb/s receiver applications are presented. We fabricated the 40 Gb/s transimpedance amplifier and post amplifier using InGaAs/InP heterojunction bipolar transistor (HBT) technology. The developed InGaAs/InP HBTs show a cut‐off frequency (f_T) of 129 GHz and a maximum oscillation frequency (f_max) of 175 GHz. The developed transimpedance amplifier provides a bandwidth of 33.5 GHz and a gain of 40.1 dBΩ. A 40 Gb/s data clean eye with 146 mV amplitude of the transimpedance amplifier module is achieved. The fabricated post amplifier demonstrates a very wide bandwidth of 36 GHz and a gain of 20.2 dB. The post‐amplifier module was fabricated using a Teflon PCB substrate and shows a good eye opening and an output voltage swing above 520 mV.     

Contention‐free approaches for WiFi MAC design for VoIP services: performance analysis and comparison

The exponential growth in the demand of voice over internet protocol (VoIP) services along with the increasing demand for mobility in VoIP services has attracted great research efforts towards provisioning of VoIP services in IEEE 802.11‐based Wireless LANs (WiFi networks). We address one of the important research problems, namely, the quality of service (QoS)‐aware efficient silence suppression in the bursty voice traffic, for provisioning VoIP services in WiFi networks. The research works in the recent literature on silence suppression in voice calls have been surveyed categorising them on how the activity arrival is notified to the access point (AP). In most of the recent schemes, notification of uplink activity arrival is done through contention based medium access mechanisms such as the distributed coordination function (DCF). Contention‐based medium access causes non‐deterministic delays, therefore such schemes are not suited to voice traffic which require strict delay bound guarantees. This paper focuses on the schemes which do not use contention based approaches for silence suppression in voice traffic. Analytical performance evaluation and comparison of such schemes is carried out. Two very important performance metrics are modelled mathematically. One is the expected polling overhead time that the schedulers in these schemes can save per voice call during one voice activity cycle as compared to that in the round‐robin polling scheduler. The other is the expected unnecessary wireless channel access delay that a typical first talk‐spurt frame experiences due to the specific design of each scheme. The numerical results of this evaluation lead us to the conclusion whether or not and to what extent each of these schemes is viable. Copyright © 2008 John Wiley & Sons, Ltd.