介电常数的实地测量装置的研制

介绍自由空间法实地测量介电常数的原理、方法和系统,依据原理,搭建室内测量系统进行了介电常数测量,利用S波段喇叭天线在垂直入射条件下接收反射波的幅度和相位,并采用金属板绝对定标法获得被测目标的反射系数,根据菲涅尔反射定律反演得到了土壤的介电常数。测量过程中引入时域去嵌技术有效抑制了多路径干扰信号,提高了幅度测量的精度;验证了测量相位的准确性,并给出了测量结果与模拟结果的比对,证明了实验的可实施行。     

A simple variable step size LMS adaptive algorithm

A new LMS based variable step size adaptive algorithm is presented. The step size is incremented or decremented by a small positive value, whenever the instantaneous error is positive or negative, respectively. The algorithm is simple, robust and efficient. It is characterized by fast convergence and low steady state mean squared error. The performance of the algorithm is analysed for a stationary zero‐mean white‐Gaussian input. MC simulations are provided to demonstrate its improved performance over the conventional LMS (Proc. IEEE 1976; 64 :1151–1162) and some other variable step size adaptive algorithms (IEEE Trans. Signal Process. 1992; 40 :1633–1642; IEEE Trans. Signal Process. 1997; 45 :631–639) within a range of statistical environments. For a non‐stationary input, the proposed algorithm behaves similar to these algorithms. A modified version of the algorithm is presented to perform in the presence of abrupt changes. Copyright © 2004 John Wiley & Sons, Ltd.     

On complete stability of linear and quadratic programming neural networks

The paper addresses complete stability (CS) of the important class of neural networks to solve linear and quadratic programming problems introduced by Kennedy and Chua (IEEE Trans. Circuits Syst., 1988; 35 : 554). By CS it is meant that each trajectory converges to a stationary state, i.e. an equilibrium point of the neural network. It is shown that the neural networks in (IEEE Trans. Circuits Syst., 1988; 35 : 554) enjoy the property of CS even in the most general case where there are infinite non‐isolated equilibrium points. This result, which is proved by exploiting a new method to analyse CS (Int. J. Bifurcation Chaos 2001; 11 : 655), extends the stability analysis by Kennedy and Chua (IEEE Trans. Circuits Syst., 1988; 35 : 554) to situations of interest where the optimization problems have infinite solutions. Copyright © 2002 John Wiley & Sons, Ltd.     

Discretization Scheme for the Density-Gradient Equation and Effect of Boundary Conditions

In recent years, the density gradient theory (DG) (M.G. Ancona and H.F. Tiersten 1987, Phys. Rev. B. 35(15): 7959–7965, M.G. Ancona 1990, Phys. Rev. B. 42: 1222) has been established as a viable alternative to the solution of the Schrödinger equation for solving problems such as charge density distribution in MOS inversion layers and MOS tunneling (M.G. Ancona 1998, J. Tech. CAD(11), M.G. Ancona et al. 2000, IEEE Trans. Electron Devices 47: 1449). Primary advantages of the DG method over the Schrödinger method are flexibility in extending to multi-dimension and easiness in incorporating into the conventional drift-diffusion or hydrodynamic solver (C.S. Rafferty et al. 1998, Proc. SISPAD, p. 137, A. Wettstein et al. 2001, IEEE Trans. Elec. Dev. 48: 279). However, the DG term that represents the quantum effects is a singular perturbation term and requires special care for discretization (X. Wang 2001, Master's thesis, University of Massachusetts, Amherst). In this work, we examine the validity of the linear vs. the nonlinear discretization scheme and the effect of boundary conditions on the scheme used.     

Antenna-coupled infrared detectors for imaging applications

Infrared focal plane arrays (IRFPAs) are a critical component in advanced infrared imaging systems. IRFPAs are made up of two parts, a detector array and a readout integrated circuit (ROIC) multiplexer. Current ROIC technology has typical pitch sizes of 20/spl times/20 to 50/spl times/50 /spl mu/m/sup 2/. In order to make antenna-coupled detectors suited for infrared imaging systems, two-dimensional (2-D) arrays have been fabricated that cover a whole pixel area with the penalty of increasing the noise figure of the detector and, therefore, reducing its performance. By coupling a Fresnel zone plate lens to a single element antenna-coupled detector, infrared radiation can be collected over a typical pixel area and still keep low-noise levels. A Fresnel zone plate lens coupled to a single-element square-spiral-coupled infrared detector has been fabricated and its performance compared to single element antenna-coupled detectors and 2-D arrays of antenna coupled detectors. Measurements made at 10.6 /spl mu/m showed a two-order-of-magnitude increase in SNR and a /spl sim/3/spl times/ increase in D/sup */ as compared to 2-D arrays of antenna-coupled detectors.     

Simple and accurate modeling of the output transition time in nanometer CMOS gates

In this paper, a model of the output transition time on nanometer CMOS gates is proposed. The development of this model follows the general approach used by Auvergne in (IEE Electron. Lett. 2002; 38 (4):175–177, IEEE Trans. Circuits Systems—part I 2000; 47 (9):1362–1369, IEEE Proc. ISCAS 2001; 5 :363–366, IEEE Trans. Computer‐Aided Design Integr. Circuits Systems 2002; 21 (11):1352–1363), which separately models the output transition time under fast and slow inputs. The proposed model is based on a combined transient and DC circuit analysis, and requires a few simulations. This approach allows for strongly reducing the number of required parameters and simulations compared with other models proposed in the literature. The analytical model proposed is very simple and has a clear physical meaning, thereby allowing an efficient implementation in CAD tools performing timing analysis, as well as an easy scalability through different processes and technology generations. Spectre simulations on a 65 nm CMOS technology and the 45, 32, 22 nm Berkeley Predictive Technology Models (BPTM) [Berkeley Predictive Technology Model (BPTM). ONLINE@11/25/2008: http://www.eas.asu.edu/～ptm/ ] show that the model accuracy is the same as the state‐of‐the‐art models, with an average error of only 4%. Comparison with currently used table‐based models showed also a significant reduction in the CPU time needed to simulate and characterize CMOS logic gates. Copyright © 2009 John Wiley & Sons, Ltd.     

Central suboptimal H∞ filter design for nonlinear polynomial systems

This paper presents the central finite‐dimensional H_∞ filter for nonlinear polynomial systems, which is suboptimal for a given threshold γ with respect to a modified Bolza–Meyer quadratic criterion including the attenuation control term with the opposite sign. In contrast to the previously obtained results, the paper reduces the original H_∞ filtering problem to the corresponding optimal H₂ filtering problem, using the technique proposed in (IEEE Trans. Automat. Control 1989; 34 :831–847). The paper presents the central suboptimal H_∞ filter for the general case of nonlinear polynomial systems based on the optimal H₂ filter given in (Int. J. Robust Nonlinear Control 2006; 16 :287–298). The central suboptimal H_∞ filter is also derived in a closed finite‐dimensional form for third (and less) degree polynomial system states. Numerical simulations are conducted to verify performance of the designed central suboptimal filter for nonlinear polynomial systems against the central suboptimal H_∞ filter available for the corresponding linearized system. Copyright © 2008 John Wiley & Sons, Ltd.     

Cellular wave computer algorithms with spatial semantic embedding for handwritten text recognition

The recognition of cursive handwritten texts is a complex, in some cases unsolvable, task. One problem is that in most cases it is difficult or impossible to identify each letter, even if the words are separated. In our new method, the identification of letters is not needed due to the extensive and iterative use of semantic and morphological information of a given language. We are using a spatial feature code, generated by a cellular nonlinear network (CNN) based cellular wave computer algorithm, and combine it with the linguistic properties of the given language. Most general‐purpose handwriting recognition systems lack the ability to integrate linguistic background knowledge because they use it only for post‐processing recognition results. The high‐level a priori background knowledge is, however, crucial in human reading and similarly it can boost recognition rates dramatically in case of recognition systems. In our new system we do not treat the visual source as the only input: geometric and linguistic information are given equal importance. On the geometric side we use word‐level holistic feature detection without letter segmentation by analogic CNN algorithms designed for cellular wave computers (IEEE Trans. Circuits Syst. 1993; 40 :163–173; Cellular Neural Networks and Visual Computing, Foundations and Applications. Cambridge University Press: Cambridge, U.K., New York, 2002). The linguistic side is based on a morpho‐syntactic linguistic system (Proceedings of COLING‐2002, vol. II, Taipei, Taiwan, 2002; 1263–1267). A novel shape coding method is used to interface them, and their interaction is enhanced via an inverse filtering technique based on features that are global or of a low confidence value. A statistical context selection method is also applied to further reduce the output word lists. Copyright © 2008 John Wiley & Sons, Ltd.     

Synthesis of multiport resistors with piecewise‐linear characteristics: a mixed‐signal architecture

Non‐linear multiport resistors are the main ingredients in the synthesis of non‐linear circuits. Recently, a particular PWL representation has been proposed as a generic design platform (IEEE Trans. Circuits Syst.‐I 2002; 49 :1138–1149). In this paper, we present a mixed‐signal circuit architecture, based on standard modules, that allows the electronic integration of non‐linear multiport resistors using the mentioned PWL structure. The proposed architecture is fully programmable so that the unit can implement any user‐defined non‐linearity. Moreover, it is modular: an increment in the number of input variables can be accommodated through the addition of an equal number of input modules. Copyright © 2005 John Wiley & Sons, Ltd.     

Estimation of synchronous machine parameters using new discrete time-filtering algorithm

This paper presents a new method for estimating synchronous machine parameters from frequency test using a discrete time-dynamic filter based on the least absolute value parameter estimation algorithm (see G.S. Christensen and S.A. Soliman, Automatica. 26 (2) (1990) 389–395). The proposed method uses a digital set of measurements for the direct axis impedance magnitude and phase as a function of the frequency for estimating the d-axis parameters, such as the direct reactance and the different direct axis time constants, as well as the q-axis parameters.A practical example from the literature is used (see F.B. De Mello and L.N. Hannet, IEEE Trans. Power Appar, Syst., PAS-102 (12) (1983) 3810–3815) to test the proposed algorithm, and results are obtained and compared with those obtained using other methods such as the least error squares algorithm (see S.A. Soliman, S.E. Emam and G.S. Christensen, Can. J. Electr. Comput. Eng., 14 (3) (1989) 98–102) and the Kalman filtering algorithm (see M. Mambo, T. Nishiwaki, Syokokawa and Y. Ueki, IEEE Trans Power Appar. Syst., PAS-100 (7) (1981) 3304–3311).     

Development of dicing technique for thin semiconductor substrate using temporally shaped femtosecond laser

Recently, semiconductor substrates for integrated circuits (ICs) have been required to be as thin as 50 µm, because many electronic devices must be miniaturized and light in weight. Machining of such thin substrates with conventional dicing techniques is very difficult. Therefore, we have proposed processing them using femtosecond laser ablation. In this work, we investigate the influence of conditions of a double pulsed laser such as the delay time and fluence on the depth and diameter in order to develop a new dicing technique for very thin ICs. A double pulsed laser (λ = 780 nm, τ = 150 fs, f = 10 Hz, Δt = 0 to 100 ps, E₁ + E₂ = 100 µJ) was focused on the Si substrate with a plano‐convex lens having a nominal focal length of 100 mm. At a delay time of 10 ps, singularly shallow and flat‐bottomed holes were obtained. When the substrates were diced under these conditions, the bottom of the processing groove was flat and very smooth, whereas many microcracks starting from the bottom of the groove formed by the conventional method have been observed. From these results, we were able to identify femtosecond laser processing conditions that were applicable to dicing of thin Si substrates. © 2004 Wiley Periodicals, Inc. Electr Eng Jpn, 149(3): 43–48, 2004; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20028     

Modelling and design considerations on CML gates under high‐current effects

In this paper, the effect of the transit time degradation of bipolar transistors on the power‐delay trade‐off in CML gates and their design is dealt with. A delay model which accounts for the transit time increase due to the high bias current values used in high‐speed applications is derived by generalizing an approach previously proposed by the same authors (IEEE Trans. CAD 1999; 18 (9):1369–1375; Model and Design of Bipolar and MOS Current—Mode Logic (CML, ECL and SCL Digital Circuits), Kluwer Academic Publisher: Dordrecht, 2005). The resulting closed‐form delay expression is achieved by properly simplifying the SPICE model, and has an explicit dependence on the bias current which determines the power consumption of CML gates. Accordingly, the delay model is used to gain insight into the power‐delay trade‐off by considering the effect of the transit time degradation in high‐speed designs. In particular, the cases where such effects can be neglected are identified, to better understand how the transit time degradation affects the performance of CML gates for current bipolar technologies. The proposed model has a simple and compact expression, thus it turns out to be suitable for pencil‐and‐paper evaluations, as well as fast timing analysis. Simulations of CML circuits with a 20‐GHz bipolar process show that the model has a very good accuracy in a wide range of current and loading conditions. Copyright © 2005 John Wiley & Sons, Ltd.     

Automatic detection and tracking of moving image target with CNN‐UM via target probability fusion of multiple features

A high speed target detection and tracking algorithm for a CNN‐UM chip is presented in this paper. The target confidence value is computed based on the fusion of target existence probabilities of features using products of weighted sums. The target decision is done with such a confidence value and target initiation is done through the temporal accumulation of the confidence. The probability of the target existence for each feature is created in the region of influence depending on the reliability and the strength of the feature. By virtue of the analogic parallel processing structure of the CNN‐UM (Roska T, Chua LO. The CNN universal machine: an analogic array computer. IEEE Trans. Circuits Systems II 1993; CAS‐40 : 163–173), real time tracking can be achieved with presently available technologies with the speed of several kilo‐frames per second. Due to the utilization of multiple features of target, robust target detection is possible via the proposed algorithm. On‐chip experiments of the proposed target‐tracking algorithm have been done and properties of the proposed approach are disclosed through the various experiments. Copyright © 2003 John Wiley & Sons, Ltd.     

聚光太阳电池户外测试

基于自主搭建的CPV(聚光光伏)户外测试系统,分析500倍聚光条件下,GaAs多结太阳电池的输出特性,寻求改善电池效率的途径,为聚光系统提供方案。通过实验得出:菲涅尔透镜与电池的距离略小于焦距时,电池的效率最高;若引入二级聚光元件,可以提高聚光电池的效率和功率输出,尤其是在出现系统跟踪偏差时更明显;再者优化散热器散热设计也可以提高电池的效率和功率输出。     

MOS‐integrable circuitry for multi‐scroll chaotic grid realization: A SPICE‐assisted proof

A MOS‐integrable circuit realization of the class of Multi‐Scroll Grid attractor using an implementation of nonlinear transconductor is presented. The design can be seen as the MOS‐integrable circuit implementation of modified jerk equations presented in the literature (Int. J. Bifurcat. Chaos 2002; 12 (1):23–41). The proposed design of Multi‐Scroll Grid attractor is adequately supported by SPICE simulation results. Copyright © 2008 John Wiley & Sons, Ltd.     

Analytical comparison of reversed nested Miller frequency compensation techniques

In this paper, novel and previously proposed reversed nested Miller compensation (RNMC) networks are analyzed and compared, and their design equations are also presented. Hence, this paper is the natural extension of a previous paper by the authors (Int. J. Circ. Theor. Appl. 2008; 36 (1):53–80), where only the nested Miller compensation topologies were treated. In particular, a coherent and comprehensive analytical comparison of the RNMC topologies, including two new networks presented for the first time, is performed by means of the figure of merit that expresses a trade‐off among gain‐bandwidth product, load capacitance and total transconductance, for equal values of phase margin (Int. J. Circ. Theor. Appl. 2008; 36 (1):53–80). The analysis shows that there is no unique optimal solution among the RNMC topologies, as this depends on the load condition as well as on the relative transconductance magnitude of each amplifier stage. From this point of view, the proposed comparison also outlines useful design guidelines for the optimization of large‐signal and small‐signal performance. Simulations confirming the effectiveness of the proposed design methodology and analytical comparison are also included. Copyright © 2009 John Wiley & Sons, Ltd.     

Threshold voltage extraction techniques adaptable from sub‐micron CMOS to large‐area oxide TFT technologies

This paper proposed simple and accurate threshold voltage (V _TH ) extraction techniques, which can be directly adaptable to various semiconductor technologies ranging from deep sub‐micron complementary metal–oxide–semiconductor to large‐area thin‐film transistor devices. These techniques are developed using multiple circuits, namely, a dynamic source follower, an inverter with a diode‐connected load and a current mirror topology, which allow a direct determination of V _TH . As the proposed techniques are experimented with large‐area emerging technologies, which have a stable single type (n‐type) transistor, all the designs employed in this work are confined to only n‐type transistors for a fair comparison. The semiconductor technologies under consideration are standard complementary metal–oxide–semiconductor (65 and 130 nm) and oxide (indium–gallium–zinc–oxide and zinc–tin–oxide) thin‐film transistors. In order to validate the accuracy of the proposed techniques, extracted V _TH from these methods are compared against the value from linear transfer characteristics. The resulting relative error is within 5%, reinforcing proposed techniques suitability to different semiconductor technologies ranging from deep sub‐micron to large‐area transistors. Copyright © 2017 John Wiley & Sons, Ltd.