USS协议变频器Web控制方法的研究与实现

随着Internet技术的迅速发展,嵌入式技术在网络方面的应用也逐渐成熟。该设计在硬件平台上移植与配置了实时操作系统μC／OS-Ⅱ和嵌入式TCP／IP协议,在此基础上设计了Web服务器,完成对变频器的监控。对USS协议变频器的Web控制进行研究,详细说明嵌入式Web服务器的设计方法。在服务器设计中,重点介绍USS协议报文的处理方法,并对嵌入式Web控制的软硬件实现进行了具体的介绍。     

微型嵌入式TCP/IP协议栈开发

嵌入式设备网络化开发具有广阔的应用前景,是网络化发展的一个重要方向,而具有TCP/IP协议栈是嵌入式设备网络化的必要条件。针对大量存在的8/16位机,本文开发了一种微型TCP/IP协议栈。并对ARP协议、IP协议、UDP协议,ICMP协议以及TCP协议的开发进行讨论。通过在Silicon Labs公司的C8051F340微控制器和CP2200以太网卡的平台上构建Web服务器进行测试,证明嵌入式TCP/IP协议栈运行良好。     

在TMS320DM642上实现嵌入式TCP/IP协议栈

实现了一个运行在数字信号处理器TMS320DM642上的嵌入式TCP/IP协议栈。对TCP/IP协议中的IP协议、ARP协议、UDP协议进行分析,完成基于TCP/IP协议的嵌入式网络系统。     

基于IP协议的卫星组网通信关键技术研究

早期卫星组网一般采用地球同步卫星(GEO)作为中继器，而现在的卫星宽带信息网则是通过星间链路(ISL)实现相邻卫星之间直接通信，研究宽带卫星组网技术对于加快我国信息基础设施建设具有极其重要的作用。本首先介绍卫星通过星间链路组网通信的系统模型，然后分析卫星网络IP系统的协议堆栈，并对卫星网络TCP/IP协议各层采用的接口和协议、基本功能、工作方式等进行详细研究，最后对卫星组网通信中涉及的物理层、数据链路层和网络层的关键技术逐一进行了探讨。     

Performance evaluation of TCP extensions on ATM over high bandwidthdelay product networks

Practical experiments in a satellite network environment assist in the design and understanding of future global networks. This article describes the practical experiences gained from TCP/IP on ATM networks over a high-speed satellite link and presents performance comparison studies of such networks with the same host/traffic configurations over local area and wide area networks. These comparison studies on the LAN, WAN, and satellite environments increase our understanding of the behavior of high-bandwidth networks. NASA's Advanced Communications Technology Satellite (ACTS), with its special characteristics and high data rate satellite channels, and the ACTS ATM Internetwork (AAI) were used in these experiments to deliver broadband traffic. Network performance tests were carried out using application-level software (Netspec) on SONET OC-3 (155.52 Mb/s) satellite links. Finally, we experimentally study the performance, efficiency, fairness, and aggressiveness of TCP Reno, TCP New Reno, and TCP SACK end hosts on ATM networks over high BDP networks     

基于嵌入式系统的TCP/IP协议栈的实现

uIP协议栈是一种免费的可实现的极小的TCP/IP协议栈,可以使用于由8位或16位微处理器构建的嵌入式系统。介绍了一种基于uIP0.9的小型TCP/IP协议栈在三星公司的嵌入式微处理器S3C44B0上的移植和实现过程。分析了uIP协议栈的结构和应用接口,描述了硬件开发板连接和组成,对uIP的研究和应用具有较好的参考价值。     

基于GR47和MCU的无线嵌入式Web Server

各种开放源代码的嵌入式操作系统以及TCP／IP协议栈的出现,极大地推动了嵌入式Web Server的发展。主要介绍基于GR47和MCU实现无线嵌入式Web Server的方法,即由GR47模块提供TCP／IP协议栈,采用TI公司的MSP430F149单片机实现HTTP协议,共同构建嵌入式Web Server的具体实现技术及相关实现方案,并给出了系统硬件原理和有关软件实现的代码框架结构。     

以太网通信在网络化测试中的实现

文章详细介绍了网络化测试的一个基本通信技术----以太网通信技术的研究和实现。使用INTEL386EX设计一块以太网通信测试单板NCEX,使用C语言实现一个在该单板上运行的嵌入式TCP/IP协议栈,单板成为UDP服务器;并使用Visual C＋＋ 6.0的Socket功能在计算机上设计UDP客户端,实现多台计算机通过以太网和UDP/IP协议与NCEX测试板同时通信。     

嵌入式TCP/IP协议栈的设计与实现

详细描述了TCP/IP协议栈的裁剪、设计和实现方案.该协议栈以PHILIPS LPC2294微处理器、以太网控制器RTL8019AS为硬件平台,采用模块化层次化的结构设计,实现了ARP、IP、ICMP、UDP等协议模块.经过精简后的协议栈代码量小,结构合理,易于移植和扩充.     

基于嵌入式LINUX的GPRS数据传输系统

简要分析了嵌入式Linux操作系统和GPRS传输原理，并结合嵌入式Linux技术和GPRS网络，提出基于嵌入式Linux操作系统的GPRS数据传输系统设计方法。目前，中国移动的GPRS网络运行稳定且支持TCP／IP协议，Linux内核也支持此协议栈，这样以很少的投入就可以开发出满足不同需要的GPRS数据传输应用。     

基于FPGA的千兆以太网设计

千兆以太网拥有传输速度快、传输距离远、稳定可靠等优点,是当前嵌入式系统的应用热点。FPGA拥有丰富的逻辑和管脚资源,常用于高速数据处理和通信的嵌入式系统。本文描述一个基于FPGA的千兆以太网系统的设计,本设计在硬件上主要使用千兆以太网PHY芯片88E1111和Altera公司的StratixⅢ系列的FPGA,在FPGA的逻辑上实现NiosⅡ嵌入式系统和以太网的MAC控制器,在NiosⅡ系统的软件上移植入MicroC／OS-Ⅱ实时多任务操作系统和NicheStackTCP／IP协议堆栈。在FPGA上实现千兆以太网设计,有效提高了系统的可靠性和集成性,充分扩展FPGA的功能。     

Afterburner [network-independent card for protocols]

Many current implementations of protocols such as the Transmission Control Protocol/Internet Protocol (TCP/IP) are inefficient because data are often accessed more frequently than necessary. Three techniques that reduce the need for memory bandwidth are proposed. The techniques are copy-on-write, page remapping, and single-copy. Afterburner, a network-independent card that provides the services that are necessary for a single-copy protocol stack, is described. The card has 1 MByte of local buffers and provides a simple interface to a variety of network link adapters, including HIPPI and asynchronous transfer mode (ATM). Afterburner can support transfers to and from the link adapter card at rates up to 1 Gbit/s. An implementation of TCP/IP that uses the features provided by Afterburner to reduce the movement of data to a single copy is discussed. Measurements of the end-to-end performance of Afterburner and the single-copy implementation of TCP/IP are presented     

基于FPGA+ARM的多路光栅数据采集系统设计

为实现对多路光栅数据进行高速采集以及远程传输,设计了基于FPGA+ARM架构的光栅数据采集系统.该系统以现场可编程逻辑门阵列(FPGA)实现对多路光栅数据同时进行高速采集、存储和传输,以ARM微处理器为核心,实现数据处理和以太网传输功能,通过对以太网协议栈的移植,实现了与PC端以TCP/IP协议完成以太网通信.通过实验...     

TCP/IP协议的ASIC设计与实现

文章介绍了一种TCP/IP协议族传输、处理TCP数据和IP数据报过程的ASIC设计-TCP/IP协议处理器的硬件实现。简单介绍了TCP/IP协议，着重介绍了TCP/IP协议处理器系统结构以及各模块设计。硬件实现的TCP/IP协议处理器提高了IP数据报的处理速度，更重要的是，将Internet网络数据传输从传统的依赖电子计算机系统的模式中解放出来，实现了脱离计算机系统环境建立Internet网络连接。     

基于嵌入式Linux系统的GPRS连接及性能评测

介绍了基于嵌入式Linux下的两种GPRS网络连接方式。以某一型号的GPRS数据传输模块为例,阐述利用模块内部TCP/IP协议栈并使用AT指令进行控制的方法,和使用Linux系统下的TCP/IP协议栈及PPP拨号的方法,并对两种方法进行了初步的评测和比较。     

Demultiplexed architectures: a solution for efficient STREAMS-basedcommunication stacks

This article analyzes the efficiency of various high-performance implementation techniques for the communication system of UNIX workstations. Using an open system implies that a certain compatibility level is required from the protocol, user interface, and implementation framework. These constraints limit the opportunities to design a high-performance communication system. The authors have designed an experimental platform around the TCP/IP protocol suite, using the STREAMS environment. A BSD TCP/IP stack and a classic STREAMS-based TCP/IP stack serve as reference implementations for performance comparisons. The article explains why the efficiency of some high-performance implementation techniques the authors have applied to this platform is limited. The impacts of the hardware architecture, operating system, and communication stack architecture on performances are analyzed. It is shown that the efficiency of data transmission would benefit from more simplicity and more synchronism in the communication environment, direct data paths between the applications and the device drivers, and a limited ILP integration     

Design and implementation of an RSVP-based quality of servicearchitecture for an integrated services Internet

The Internet Engineering Task Force (IETF) is currently in the process of overhauling the architecture of the Internet to meet new challenges and support new applications. One of the most important components of that venture is the enhancement of the Internet service model from a classless best effort service architecture to an integrated services architecture supporting a multitude of classes and types of services. This paper presents the design, implementation, and experiences with a protocol architecture for the integrated services Internet. It is based on the emerging standards for resource reservation in the Internet, namely, the RSVP protocol and the associated service specifications defined by the IETF. Our architecture represents a major functional enhancement to the traditional TCP/IP protocol stack. It is scalable in terms of performance and number of network sessions, and supports a wide variety of network interfaces ranging from legacy LAN interfaces, such as Token Ring and Ethernet, to high-speed ATM interfaces. The paper also describes the implementation of this architecture on the IBM AIX platform and our experiences with the system. We then present a performance analysis of the system which quantifies the overheads imposed by all components of the QoS support, such as traffic policing, traffic shaping, and buffer management     

Performance of DTN protocols in space communications

Delay/disruption tolerant networking (DTN) was developed to enable automated network communications despite the long link delay and frequent link disruptions that generally characterize space communications. The performance of DTN convergence layer adapter (CLA) protocols over asymmetric space communication channels has not yet been comprehensively characterized. In this paper, we present an experimental performance evaluation of DTN CLA protocols for reliable data transport over a space communication infrastructure involving asymmetric channel rates, with particular attention to the recently developed Licklider transmission protocol (LTP) CLA (i.e., LTPCL). The performance of LTPCL is evaluated in comparison with other two reliable CLAs, TCP CLA and a hybrid of TCP CLA and LTPCL, for long-delay cislunar communications in the presence of highly asymmetric channel rates. LTPCL is also evaluated and analyzed in a deep-space communication scenario characterized by a very long link delay and lengthy link disruptions.     

How a large ATM MTU causes deadlocks in TCP data transfers

The implementation of protocols, such as TCP/IP, and their integration into the operating system environment is crucial for protocol performance. Putting TCP on high-speed networks, e.g., ATM, with large maximum transmission units causes the TCP maximum segment size to be relatively large. What Nagle's algorithm considers a “small” segment is no longer small, which affects the TCP performance. The authors report on TCP/IP throughput and RPC response time performance measurements for various sizes of send and receive socket buffers, using the Sparc10 architecture machines Axil 311/5.1 running SunOS 4.1.3 connected to a FORE System's ATM network. For some common combinations of socket buffer sizes the authors observe a dramatic performance degradation to less than 1% of expected throughput and to one order-of-magnitude longer response time than expected. The performance degradation is caused by a deadlock situation in the TCP connection which is resolved by the 200 ms spaced timer generated TCP delayed acknowledgment. The authors explain the causes of the deadlock situations, and discuss means to avoid or prevent them     

Parallel host interface for an ATM network

The design of a parallel protocol processing system for a host system connected to an asynchronous transfer mode (ATM) network is described. Interesting aspects of the design are that the AAL5 adaptation layer is realized in hardware directly on the network adapter, and that the network adapter semetric interfaces to a multiprocessor using the processor's memory bus. Support also exists for implementing parallel protocols up to and including the application layer. Parallel implementations of TCP/IP, ISO Session, and presentation protocols are outlined