YG算法设计衍射光学光束整形器件的两种改进

对YG算法进行了两种改进 :ST改进和ST 输入输出联合改进 ,数学证明了这两种改进的有效性 ,并完成了衍射光学光束整形器件的设计。结果表明 ,这两种改进使得算法对初始值不敏感 ,获得了更好的整形性能 ,具有更高的收敛效率。而且 ,ST 输入输出联合改进的使用可以缓解光束整形中不同性能参数间的矛盾。     

长期演进上行随机接入接收端算法研究

在LTE（长期演进）上行随机接入中,接收端对前导的检测是一个很重要的步骤。由于前导序列较长,传统的接收端算法运算量较大。为了减小接收端算法的运算量,引入降采样,对传统的接收端算法进行改进。改进后的接收端算法运算量大大减少。以格式0为例,在一个计算周期内,改进后的算法运算量是改进前运算量的1/120。MTLAB仿真结果表明,改进前后的接收端算法在检测性能上差别较小。在不同的信道环境下,经过改进后的算法仍然具有较好的检测性能。     

提升质量改进过程的有效性

质量改进是企业追求的永恒目标,该文从质量改进过程的组织建立到质量改进过程本身的策划、实施、监控、完善等环节入手,探讨了提升质量改进有效性的方法,为企业在质量改进过程中持续稳定地展现有效性、实现期望的增值提供参考.     

Reliability and quality in design

Designers are not immune to improvements even though they treasure independence and autonomy. The author argues that it is important that: there be both a strategic and annual reliability and quality improvement plan for the way designing is done; there should be both a strategic and annual reliability and quality improvement plan for designs; a systematic approach should be used in the improvement effort; and measures of design process improvement can and should be made on the inputs to activities and output of design processes. Many organizations have shown substantial improvement in the design effort     

基于电磁兼容的高速传输电连接器结构优化

针对目前高速传输电连接器插头电磁兼容性能较差的现状,提出了改进结构以增强其电磁兼容性能。结构改进为插头对接端增加屏蔽罩结构,并根据波导理论评估了当屏蔽罩对接端厚度h =0.28 cm 时,电连接器能增加38.5dB 的屏蔽效能。对改进前后的电连接器插头进行电磁场屏蔽效应仿真,仿真结果表明结构改进使屏蔽效能增加了21.9dB,验证了结构改进的可行性。对改进前和改进后的结构进行了静电抗扰度试验和电磁屏蔽试验,试验结果表明:结构改进前空气放电和接触放电引起的接触件两端电压分别为37.6 V、14.3 V,结构改进后空气放电和接触放电引起的接触件两端电压分别为4.8 V、3.3 V,结构改进后插头端面屏蔽效能为15.2dB。基于电磁兼容的高速传输电连接器结构优化为电连接器设计、电磁兼容性能升级提供了参考。     

对限制MTI改善因子的因素分析

动目标显示(MTI)技术是雷达在杂波环境中发现目标的有效手段。改善因子能较全面地反映动目标显示雷达的工作质量，因此影响系统工作质量的因素集中表现在对改善因子的限制上。基于动目标显示改善因子，综合考虑了雷达系统各主要部件工作的稳定性、杂波内部运动、天线扫描等内部因素及气象杂波等外部因素对改善因子的限制，并以接收系统的稳定性为例，对比分析了其对一次和二次对消器改善因子的影响。     

改进BP神经网络在手写数字识别中的性能研究

BP神经网络有网络结构本身的改进，基于传统梯度下降算法的改进和基于数值优化算法的改进三个主要方面。针对经过大量预处理后的较规范手写体数字样本，提取一种13维的结构特征向量，采用多种改进方式进行训练和识别测试以比较不同算法的性能。     

Changeover Improvement: Reinterpreting Shingo's “SMED” Methodology

A rapid changeover capability is widely acknowledged as an essential prerequisite to flexible, responsive small batch manufacturing. Its importance in mass customization is recognized, where minimal losses need to be incurred as manufacture switches between differing products. Retrospective improvement of existing changeover practice is often undertaken, arising from pressure to respond better to customer demands, wherein improvement personnel frequently engage Shigeo Shingo's Single Minute Exchange of Die (SMED) methodology to achieve better performance. Irrespective of the improvement methodology that is employed this paper assesses two fundamental mechanisms by which better changeovers might be achieved. First, improvement can occur by altering when tasks are conducted. Better allocation of tasks to the resources necessary to conduct them is sought, where the tasks themselves remain essentially unchanged. The second mechanism is to seek structural change to existing tasks, thereby intrinsically enabling them to be completed more quickly. These two mechanisms are described in relation to use of the SMED methodology, where it is argued that, by reinterpreting Shingo's work, greater clarity of potential improvement options can be gained     

Using yield models to accelerate learning curve progress[semiconductor industry]

Worldwide competitive pressure is driving successful semiconductor companies toward ever improving performance-price ratios. In addition, this pressure is accelerating the rate of performance-price improvement. Using yield models can accelerate the rate at which processing experience reduces manufacturing costs. This paper reviews learning curves, outlines an improvement strategy using yield models, presents enhancements, and illustrates an application of yield models to accelerate learning. Detailed, validated models can simulate the yield effects of process and equipment improvement plans. Yield models, used with short-loop defect monitors, allow rapid feedback of experimental results to yield improvement efforts by compressing normal processing cycle times     

Method of site diversity approximation for satellite link analysis using single attenuation time series

A method of approximating the site diversity improvement for a single time series of attenuation is presented. The diversity improvement results for 40 and 50 GHz beacons are compared to the ITU-R model for site diversity improvement and are shown to fit well.     

频率误差对双基地雷达改善因子的影响

收发相位同步是双基地雷达相参处理的前提,相位同步误差会对改善因子产生影响。首先建立了考虑相位同步误差的相参检波信号模型,在此基础上,导出了相位同步误差对改善因子影响的关系式,最后通过仿真分别给出了不同杂波类型,不同重复频率时相位同步误差对改善因子影响的结果。仿真结果表明,相位同步误差越大,对各类杂波改善因子的影响也越大,当误差为10 Hz时,地杂波改善因子下降十几分贝,且载波频率为1 GHz时,若要求MTI改善因子为50 dB,稳定本振的频率稳定度需满足10-8的数量级。     

小小区增强技术的标准化最新进展

3GPP Release12对小小区增强进行了标准化，主要内容包括频谱效率和运营效率的提升。其中下行引入了更高阶的256QAM调制来提升频谱效率，并引入新的发现信号和空口同步机制来提升运营效率。     

Semiconductor yield improvement: results and best practices

The results of a world-wide study on yield improvement are presented. Die yields collected from 21 fabs are transformed via a logit formula and compared. The die yields and die yield improvement rates of the fabs are compared, and manufacturing yield improvement practices are evaluated. Preliminary results of this continuing study indicate that die yield improvement is a function of computer-aided manufacturing practices and statistical process control practices in addition to commonly cited practices such as particle control and advanced manufacturing technology     

物联网应用对3GPP核心网络的影响

结合物联网技术及3GPP网络优化技术,首先介绍物联网应用的背景、巨大的市场潜力与产业化需要解决的问题,引出物联网应用对3GPP网络的影响与优化需求,并给出3GPP网络架构与流程优化的相关解决方案,最终体现出通过一系列的网络优化技术可以实现3GPP网络对物联网应用的支持。     

A timely detection of a coated board streak defect in subsampling conditions using monochrome vision system

This paper presents a study of an important improvement in an already installed monochrome vision system for detection of defects during coated board manufacture. This improvement allows the inspection system to detect targeted defect in subsampling conditions (i.e. Nyquist theorem is not satisfied). This improvement is accomplished entirely in the image processing software without the need for additional changes in the vision hardware. Processing software is optimized for SIMD instruction set requiring no improvement in the processing hardware. Results obtained by the use of this improved algorithm provide real time detection of the targeted defect that in turns enables elimination of the waist coated board.     

Multiple symbol differential detection for trellis-coded MPSK overRayleigh fading channels

This paper presents a multiple-symbol differential detection scheme for coded and interleaved transmission of MPSK data. The performance of this scheme is then evaluated for transmission of digitized voice over a Rayleigh fading channel. It is found that in terms of bit error rate, the improvement given by using multiple-symbol differential detection is minimal, but when evaluated in terms of frame-error rate, the multiple-symbol scheme gives about 1.25-dB improvement. Another 0.75-dB improvement can be obtained by also using a serial list Viterbi algorithm     

Methods of reducing defects in GaAs ICs

This is a recount of a quality improvement journey. An admirable goal is to reach zero defects. At a resolution of parts per million, “zero” was achieved during the study described here. Of course, there is room for improvement with a higher resolution measurement. Regardless of the absolute measurement, the defective level was reduced to less than one thousandth of the starting level during this study. Several methods of defect reduction will be discussed. First, key philosophies of management will be explained. Next, several processes will be described which provided the framework for individual examples of improvement techniques. Ten specific improvement examples will be presented, each resulting in significant reductions in defects measured.     

Improvement in the tetrode FET noise figure by neutralization and tuning

The noise figure of the tetrode FET is calculated, and it is shown that for frequencies near the cutoff frequency of the FET a considerable improvement in noise figure is possible by neutralizing the drain-gate capacitance C/SUB dg/ of the first half of the tetrode and by tuning the interstage network between the first and second half of the tetrode FET. To make this improvement possible, the tetrode FET must be provided with one extra lead connecting drain 1 + source 2 to the outside. The improvement is demonstrated for an FET cascode circuit.     

Equation formulation considerations for efficient numerical modeling of semiconductor phenomena

This paper highlights the importance of equation formulation and associated programming efficiency with respect to modeling of semiconductor phenomena via numerical methods.Two numerical modeling efforts are developed in this paper for one-space dimension device modeling. It is shown on a per iteration basis that the ratio of the computational effort between the two methods is a factor of sixteen. The reduction in the computational effort between the two methods was realized by reformulating the mathematical equations and by reconsidering the effect of programming efficiency. A by-product of the reformulation was a factor of two to three improvement in the convergence rate of the nonlinear iteration. With all considerations, the overall improvement in the solution times for one-space dimension device numerical modeling was determined to be a factor of 30–50.When considering equation formulation alone, the per iteration improvement is a factor of 1·43. Coupled with the two to three convergence rate improvement the overall improvement due to equation formulation was approximately 3·67.     

Effective synthesis algorithm for partitioned bus architecture

An effective synthesis algorithm is proposed for partitioned bus architecture when the number of buses is constrained. In the proposed algorithm, the probability of bus conflict is reduced, leading to a performance improvement. Experimental results show ~10-50% performance improvement over the conventional method