自支撑衬底n-GaN肖特基接触的电流输运机制研究

在自支撑衬底n-GaN外延片上制备了圆形Ni/Au/n-GaN肖特基接触结构,测量和分析器件的变温电流-电压(I-V)特性,研究了其正向和反向电流的输运机制。结果表明:在正向偏压下,随着温度从300K增加至420K,器件的理想因子由1.8减小至1.2,表明在高温下复合机制逐渐被热发射机制替代;在反向小偏压下,漏电流表现显著的温度和电压依赖特性,且ln(I)-E~(1/2)数据满足较好线性规律,这表明肖特基效应的电子热发射机制应占主导;而在更高的反向偏压下,电流逐渐变成温度的弱函数,且数据遵循ln(I/E~2)-1/E线性依赖关系,该行为与Fowler-Nordheim隧穿特性一致。     

负偏压对磁控溅射Mg_2Si薄膜的影响

采用直流磁控溅射加负偏压方法和退火工艺制备了Mg_2Si半导体薄膜,研究了不同负偏压对Mg膜的沉积速率、Mg_2Si薄膜结构以及电阻率的影响。结果表明,随着负偏压的增大,因压实膜层和二次溅射效应,Mg膜的沉积速率越来越小;在未加负偏压时,Mg_2Si薄膜的衍射峰最强、样品表面平整致密,当衬底加上负偏压后,Mg_2Si衍射峰都有所减弱,样品表面变得凹凸不平;当负偏压达到–150 V时,表面已呈现明显的熔融状态,表明负偏压对Mg_2Si薄膜的晶体结构没有有益影响。Mg_2Si薄膜的电阻率随着所加负偏压的增大先减小后增大,并在–90 V时达到最小值。     

0.25 μm栅长GaAs pHEMT栅极高温及关态应力退化机理

GaAs赝配高电子迁移率晶体管(pHEMT)的关态栅极漏电流取决于温度与电应力环境。研究了高温与电应力对0.25 μm GaAs pHEMT肖特基特性的影响。该pHEMT的反向偏置栅极漏电流主要受陷阱辅助发射机制和隧穿电流机制的影响。建立模型,对不同温度下栅极漏电流曲线进行拟合,结果表明,栅极漏电流在常温下由隧穿电流机制主导,在高温下由陷阱辅助发射机制主导。在高温关态应力下对栅极漏电流随应力时间变化的过程进行表征,从时间层面再次验证了两种机制在不同温度下发生转变的过程。     

R.F.溅射Ba_(0.5)Sr_(0.5)TiO_3/RuO_2薄膜及其介电特性研究

用R.F.磁控溅射法在p—Si(100)衬底上沉积Ba0.5Sr0.5TiO3/RuO2异质结,BST薄膜的晶相和表面形貌用XRD和SEM分析,表明在衬底温度为550℃时,薄膜的结晶度高、表面粗糙、晶粒较大.电容器InGa/BST/RuO2的介电特性由ε-V特性和I—V特性描述.薄膜在零偏压下ε=230、tgδ≈0.03.低电场条件下,薄膜的漏电流随电压呈饱和特性,属电子跳跃传导,且通过改善薄膜的结晶度可减小该漏电流.高电场条件下,漏电流符合肖特基发射规律.     

R.F.溅射Ba0.5Sr0.5TiO3/RuO2薄膜及其介电特性研究

用R．F．磁控溅射法在p-Si(100)衬底上沉积Ba0．5Sr0．5TiO3／RuO2异质结，BST薄膜的晶相和表面形貌用XRD和SEM分析，表明在衬底温度为550℃时，薄膜的结晶度高、表面粗糙、晶粒较大。电容器InGa／BST／RuO2的介电特性由ε—V特性和I—V特性描述。薄膜在零偏压下ε=230、tgδ≈0．03，低电场条件下，薄膜的漏电流随电压呈饱和特性，属电子跳跃传导，且通过改善薄膜的结晶度可减小该漏电流，高电场条件下，漏电流符合肖特基发射规律。     

3300 V-10 A SiC肖特基二极管北大核心CSCD

利用一次离子注入同时形成有源区和结终端结构,实现3 300 V 4H-SiC肖特基二极管。器件的正向电压为1.7 V时,电流达到10.3 A,相应电流密度为100 A/cm2,比导通电阻为7.77 mΩ·cm2。在3 300 V反向偏置电压下反向漏电流为226μA。测试同一晶圆上的pn二极管显示,设计的场限环结终端击穿电压可以达到4 000 V,达到仿真结果的95%。分析发现肖特基二极管的漏电流主要由肖特基接触的热场电子发射产生,有源区的肖特基接触线宽直接影响器件的正向电流密度和反向漏电流。设计合适的肖特基接触宽度是实现高性能器件的关键。     

掺钐钛酸铅铁电薄膜的制备和主要性质

采用金属有机分解法(MOD)在P型Si(111)衬底上制备了Pb0.85Sm0.1TiO3(PST)薄膜。用X-射线衍射技术研究了退火温度对薄膜的结构和结晶性的影响。同时还研究了薄膜的介电、铁电和绝缘性能。结果发现在600°C下退火1h的PST薄膜呈钙钛矿结构;在0～16V范围内,薄膜的漏电流小于1.17×10-7A;在±10V的偏压范围内,电容-电压(C-V)记忆窗口宽度为4.5V;在室温10kHz下,其介电常数为37.25,介电损耗为0.042。     

3300 V-10 A SiC肖特基二极管

利用一次离子注入同时形成有源区和结终端结构,实现3 300 V 4H-SiC肖特基二极管。器件的正向电压为1.7 V时,电流达到10.3 A,相应电流密度为100 A/cm2,比导通电阻为7.77 mΩ·cm2。在3 300 V反向偏置电压下反向漏电流为226μA。测试同一晶圆上的pn二极管显示,设计的场限环结终端击穿电压可以达到4 000 V,达到仿真结果的95%。分析发现肖特基二极管的漏电流主要由肖特基接触的热场电子发射产生,有源区的肖特基接触线宽直接影响器件的正向电流密度和反向漏电流。设计合适的肖特基接触宽度是实现高性能器件的关键。     

La掺杂对BLT薄膜微观结构与性能的影响

采用sol-gel工艺低温制备了Si基Bi4–xLaxTi3O12(BLT)铁电薄膜。研究了La掺杂量对薄膜微观结构、介电和铁电性能的影响。结果表明,600～650℃退火处理的BLT薄膜表面平整无裂纹,晶粒均匀,无焦绿石相或其它杂相,薄膜为多晶生长;La掺杂量x在0.5～0.85的BLT薄膜介电与铁电性能优良,其εr和tanδ分别介于284～289和(1.57～1.63)×10–2,4V偏压下薄膜的漏电流密度低于10–8A/cm2,Pr可达(13.0～17.5)×10–6C/cm2,Ec低至(102.5～127.8)×103V/cm。     

快速退火对Pt/BST/Pt电容器结构和性能的影响

采用脉冲激光沉积(PLD)法在Pt/Ti/SiO2/Si(001)基片上制备了Ba0.6Sr0.4TiO3(BST)薄膜,对Pt/BST/Pt电容器在空气中进行400℃快速退火(RTA)处理,研究了快速退火对Pt/BST/Pt电容器的结构和性能的影响。结果表明:快速退火虽然对BST薄膜的结晶质量影响较小,但却极大改善了Pt/BST/Pt电容器的电学性能。当测试频率为100kHz、直流偏压为0V时,介电损耗从快速退火前的0.07减小到0.03,介电常数和调谐率略有增加。快速退火后负向漏电流过大现象得到了明显抑制,正负向漏电流趋于对称,在300×103V/cm电场强度下,漏电流密度为4.83×10–5A/cm2。     

Al_2O_3栅介质的制备工艺及其泄漏电流输运机制

利用室温下反应磁控溅射结合炉退火的方法在P Si(10 0 )衬底上制备了Al2 O3 栅介质层,研究了不同的溅射气氛和退火条件对Al2 O3 栅介质层物理特性的影响.结果表明:在较高温度下N2 气氛中退火有助于减小泄漏电流;在O2 气氛中退火有助于减少Al2 O3 栅介质中的氧空位缺陷.对Al2 O3 栅介质泄漏电流输运机制的分析表明,在电子由衬底注入的情况下,泄漏电流主要由Schottky发射机制引起,而在电子由栅注入的情况下,泄漏电流可能由Schot tky发射和Frenkel Poole发射两种机制共同引起.     

退火温度对Au/Ti/4H-SiC肖特基接触特性的影响

采用电子束蒸发法在4H-SiC表面制备了Ti/Au肖特基电极,研究了退火温度对Au/Ti/4H-SiC肖特基接触电学特性的影响.对比分析了不同退火温度下样品的电流密度-电压(J-V)和电容-电压(C-V)特性曲线,实验结果表明退火温度为500℃时Au/Ti/4H-SiC肖特基势垒高度最大,在.J-V测试和C-V测试中分别达到0.933 eV和1.447 eV,且获得理想因子最小值为1.053,反向泄漏电流密度也实现了最小值1.97×10-8 A/cm2,击穿电压达到最大值660 V.对退火温度为500℃的Au/Ti/4H-SiC样品进行J-V变温测试.测试结果表明,随着测试温度的升高,肖特基势垒高度不断升高而理想因子不断减小,说明肖特基接触界面仍然存在缺陷或者横向不均匀性,高温下的测试进一步证明肖特基接触界面还有很大的改善空间.     

HfO_2高k栅介质漏电流机制和SILC效应

利用室温下反应磁控溅射的方法在 p- Si(1 0 0 )衬底上制备了 Hf O2 栅介质层 ,研究了 Hf O2 高 k栅介质的电流传输机制和应力引起泄漏电流 (SIL C)效应 .对 Hf O2 栅介质泄漏电流输运机制的分析表明 ,在电子由衬底注入的情况下 ,泄漏电流主要由 Schottky发射机制引起 ,而在电子由栅注入的情况下 ,泄漏电流由 Schottky发射和 Frenkel-Poole发射两种机制共同引起 .通过对 SIL C的分析 ,在没有加应力前 Hf O2 / Si界面层存在较少的界面陷阱 ,而加上负的栅压应力后在界面处会产生新的界面陷阱 ,随着新产生界面陷阱的增多 ,这时在衬底注入的情况下 ,电流传     

Effect of annealing on electrical properties of radio-frequency-sputtered ZnO films

We report on the electrical properties of ZnO films and devices grown on different substrates by radio-frequency magnetron sputtering. The films grown on c-plane sapphire were annealed in the range 800–1,000°C. The electron concentration increased with annealing temperature reaching 1.4×10¹⁹ cm^?3 for 1,000°C. Mobility also increased, however, reaching its maximum value 64.4 cm²/V · sec for 950°C anneal. High-performance Schottky diodes were fabricated on ZnO films grown on n-type 6H-SiC by depositing Au/Ni(300/300 Å). After annealing at 900°C, the leakage current (at ?5 V reverse bias) decreased from 2.2 × 10^?7 A to ～5.0 × 10^?8 A after annealing at 900°C, the forward current increased by a factor of 2, and the ideality factor decreased from 1.5 to 1.03. The ZnO films were also grown on p-type 6H-SiC, and n-ZnO/p-SiC heterostructure diodes were fabricated. The p-n diode performance increased dramatically after annealing at 950°C. The leakage current decreased from 2.0×10^?4 A to 3.0×10^?7 A at ?10 V reverse bias, and the forward current increased slightly from 2.7 mA to 3.9 mA at 7 V forward bias; the ideality factor of the annealed diode was estimated as 2.2, while that for the as-grown sample was considerably higher.     

4H-SiC混合PN/Schottky二极管的研制

报道了4H-SiC混合PN/Schottky二极管的设计、制备和特性．该器件用镍作为肖特基接触金属,使用了结终端扩展（JTE）技术．在肖特基接触下的n型漂移区采用多能量注入的方法形成P区而组成面对面的PN结,这些PN结将肖特基接触屏蔽在高场之外,离子注入的退化是在1500℃下进行了30min．器件可耐压600V,在600V时的最小反向漏电流为1×10-3A/cm2．1000μm的大器件在正向电压为3V时电流密度为200A/cm2,而300μm的小尺寸器件在正向电压为3.5V电流密度可达1000A/cm2．     

Investigation of structural and optoelectronic properties of annealed nickel phthalocyanine thin films

Thin films of nickel phthalocyanine (NiPc) were prepared by thermal evaporation and the effects of annealing temperature on the structural and optical properties of the samples were studied using different analytical methods. Structural analysis showed that the grain size and crystallinity of NiPc films improved as annealing temperature increased from 25 to 150 °C. Also, maximum grain size (71.3 nm) was obtained at 150 °C annealing temperature. In addition, NiPc films annealed at 150 °C had a very smooth surface with an RMS roughness of 0.41 nm. Optical analysis indicated that band gap energy of films at different annealing temperatures varied in the range of 3.22–3.28 eV. Schottky diode solar cells with a structure of ITO/PEDOT:PSS/NiPc/Al were fabricated. Measurement of the dark current density–voltage (J–V) characteristics of diodes showed that the current density of films annealed at 150 °C for a given bias was greater than that of other films. Furthermore, the films revealed the highest rectification ratio (23.1) and lowest barrier height (0.84 eV) demonstrating, respectively, 23% and 11% increase compared with those of the deposited NiPc films. Meanwhile, photoconversion behavior of films annealed at 150 °C under illumination showed the highest short circuit current density (0.070 mA/cm²) and open circuit voltage of (0.55 V).     

Analysis of morphological, structural and electrical properties of annealed TiO2 nanowires deposited by GLAD technique

The effect of annealing on vertically aligned TiO₂ NWs deposited by glancing angle deposition (GLAD) method on Si substrate using pressed and sintered TiO₂ pellets as source material is studied.The FE-SEM images reveal the retention of vertically aligned NWs on Si substrate after annealing process.The EDS analysis of TiO₂ NWs sample annealed at 600℃ in air for 1 h shows the higher weight percentage ratio of~2.6(i.e.,72.27% oxygen and 27.73% titanium).The XRD pattern reveals that the polycrystalline nature of anatase TiO₂ dominates the annealed NWs sample.The electrical characteristics of Al/TiO₂-NWs/TiO₂-TF/p-Si (NW device) and Al/TiO₂-TF/p-Si (TF device) based on annealed samples are compared.It is riveting to observe a lower leakage current of~1.32×10^-7 A/cm² at+1 V with interface trap density of~6.71×10¹¹ eV^-1cm^-2 in NW device compared to~2.23×10^-7 A/cm² in TF device.The dominant leakage mechanism is investigated to be generally Schottky emission;however Poole-Frenkel emission also takes place during high reverse bias beyond 4 V for NWs and 3 V for TF device.     

一种新型肖特基整流管设计

在研究功率肖特基整流管的基础上,针对反向击穿电压、漏电流、抗浪涌能力的提高,采取加场限环的方法,设计并制造了一种新型结势垒肖特基整流管(Junction barrier Schottky rectifier,JBS)。通过从有源区参数、外延材料、流片工艺、产品电参数、可靠性等方面进行了全面设计。经测试,电参数水平正向电压VF：0.85-0.856V,反向电流IR：4-50.5uA,反向电压VR:307.5-465.2V,抗静电水平从低温退火的6-12KV提高到15KV,经高温直流老化后,可靠性电参数水平满足预期的设计要求。     

High-temperature Schottky diodes with thin-film diamond base

High-temperature (500-580°C) current-voltage (I-V ) characteristics of gold contacts to boron-doped homoepitaxial diamond films prepared using a plasma-enhanced chemical vapor deposition (CVD) method are described. Schottky diodes were formed using gold contacts to chemically cleaned boron-doped homoepitaxial diamond films. These devices incorporate ohmic contacts formed by annealing Au(70 nm)/Ti(10 nm) layers in air at 580°C. The experiments with homoepitaxial diamond films show that the leakage current density increases with the contact area. This implies that a nonuniform current distribution exists across the diode, presumably due to crystallographic defects in the diamond film. As a result, Au contacts with an area >1 mm² are essentially ohmic and can be used to form back contacts to Schottky diodes. Schottky diodes fabricated in this matter also show rectifying I-V characteristics in the 25-580°C temperature range     

High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment

We report a novel approach in fabricating high-performance enhancement mode (E-mode) AlGaN/GaN HEMTs. The fabrication technique is based on fluoride-based plasma treatment of the gate region in AlGaN/GaN HEMTs and post-gate rapid thermal annealing with an annealing temperature lower than 500/spl deg/C. Starting with a conventional depletion-mode HEMT sample, we found that fluoride-based plasma treatment can effectively shift the threshold voltage from -4.0 to 0.9 V. Most importantly, a zero transconductance (g/sub m/) was obtained at V/sub gs/=0 V, demonstrating for the first time true E-mode operation in an AlGaN/GaN HEMT. At V/sub gs/=0 V, the off-state drain leakage current is 28 /spl mu/A/mm at a drain-source bias of 6 V. The fabricated E-mode AlGaN/GaN HEMTs with 1 /spl mu/m-long gate exhibit a maximum drain current density of 310 mA/mm, a peak g/sub m/ of 148 mS/mm, a current gain cutoff frequency f/sub T/ of 10.1 GHz and a maximum oscillation frequency f/sub max/ of 34.3 GHz.